C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 217

KIT DEV FOR C8051F360 FAMILY

C8051F360DK

Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F360DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
18.6. SMBus Status Decoding
The current SMBus status can be easily decoded using the SMB0CN register. In the table below, STATUS
VECTOR refers to the four upper bits of SMB0CN: MASTER, TXMODE, STA, and STO. The shown
response options are only the typical responses; application-specific procedures are allowed as long as
they conform to the SMBus specification. Highlighted responses are allowed but do not conform to the
SMBus specification.
1110
1100
Values Read
0
0
0
0
0
0
X A master START was generated.
0
1
Current SMbus State
A master data or address byte
was transmitted; NACK received.
A master data or address byte
was transmitted; ACK received.
Table 18.4. SMBus Status Decoding
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
Typical Response Options
Load slave address + R/W
into SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and
start another transfer.
Send repeated START.
Switch to Master Receiver
Mode (clear SI without writ-
ing new data to SMB0DAT).
0
0
0
1
0
1
1
0
Written
Values
0
0
1
0
1
1
0
0
X
X
X
X
X
X
X
X
217

Related parts for C8051F360DK