C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 195

KIT DEV FOR C8051F360 FAMILY

C8051F360DK

Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F360DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
Bits 7–0: P1MASK[7:0]: Port1 Mask Value.
Bits 7–0: P2.[7:0]
SFR Page:
SFR Address:
SFR Page:
SFR Address:
P2.7
R/W
R/W
Bit7
Bit7
These bits select which Port pins will be compared to the value stored in P1MAT.
0: Corresponding P1.n pin is ignored and cannot cause a Port Match event.
1: Corresponding P1.n pin is compared to the corresponding bit in P1MAT.
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P2MDIN. Directly reads Port
pin when configured as digital input.
0: P2.n pin is logic low.
1: P2.n pin is logic high.
0
0xE2
all pages
0xA0
P2.6
R/W
R/W
Bit6
Bit6
SFR Definition 17.14. P1MASK: Port1 Mask
P2.5
R/W
R/W
Bit5
Bit5
(bit addressable)
SFR Definition 17.15. P2: Port2
P2.4
R/W
R/W
Bit4
Bit4
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
P2.3
R/W
R/W
Bit3
Bit3
P2.2
R/W
R/W
Bit2
Bit2
P2.1
R/W
R/W
Bit1
Bit1
P2.0
R/W
R/W
Bit0
Bit0
00000000
Reset Value
Reset Value
11111111
195

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