C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 91

KIT DEV FOR C8051F360 FAMILY

C8051F360DK

Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F360DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
While in the ADC0 ISR, a PCA interrupt occurs. Recall the PCA interrupt is configured as a high priority
interrupt, while the ADC0 interrupt is configured as a low priority interrupt. Thus, the CIP-51 will now vector
to the high priority PCA ISR. Upon doing so, the CIP-51 will automatically place SFR page 0x00 into the
SFRPAGE register. The value that was in the SFRPAGE register before the PCA interrupt (SFR Page 0x00
for ADC0) is pushed down the stack into SFRNEXT. Likewise, the value that was in the SFRNEXT register
before the PCA interrupt (in this case SFR Page 0x0F for OSCICN) is pushed down to the SFRLAST reg-
ister, the “bottom” of the stack. Note that a value stored in SFRLAST (via a previous software write to the
SFRLAST register) will be overwritten. See Figure 9.6 below.
Figure 9.6. SFR Page Stack Upon PCA Interrupt Occurring During an ADC0 ISR
Figure 9.5. SFR Page Stack After ADC0 Window Comparator Interrupt Occurs
SFRPAGE
SFRNEXT
pushed to
SFRPAGE
SFRNEXT
pushed to
SFRNEXT
SFRLAST
pushed to
SFRPAGE on ADC0
(OSCICN)
pushed on stack in
(OSCICN)
SFR Page 0x00
SFRPAGE on PCA
(ADC0)
pushed on stack in
Automatically
SFR Page 0x00
(ADC0)
0x00
0x0F
Automatically
(PCA)
interrupt
0x00
0x00
0x0F
interrupt
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
SFRPAGE
SFRNEXT
SFRLAST
SFRPAGE
SFRNEXT
SFRLAST
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