C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 287

• Manufacturer Part Number: C8051F360DK
• Description: KIT DEV FOR C8051F360 FAMILY
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F360DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F36x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1410

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Revision 0.1 to Revision 0.2
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Revision 0.2 to Revision 1.0
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Updated specification tables with most recently available characterization data.
Fixed an error with the SYSCLK specification in Table 3.1, “Global Electrical Characteristics,” on
page 33.
Corrected the name of the PMAT bit in SFR Definition 10.2. IP: Interrupt Priority.
Corrected the reset value for SFR Definition 22.2. PCA0MD: PCA0 Mode.
Updated specification tables with characterization data.
Fixed Table 1.1, “Product Selection Guide,” on page 19 to reflect the correct number of Port I/O pins
for the C8051F361/2/4/5.
Updated Section “10. Interrupt Handler” on page 107.
Updated SFR Definition 11.1
Updated SFR Definition 15.2.
Added Table 16.2, “Internal Low Frequency Oscillator Electrical Characteristics,” on page 172.
Updated SFR Definition 16.9:
Added Table 19.7 and Table 19.8 on page 233 for UART Baud Rates when using the PLL.
Updated Table 22.1, “PCA Timebase Input Options,” on page 265:
Added Revision B to “Revision Specific Behavior” on page 281.
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Added note describing EA change behavior when followed by single cycle instruction.
Changed the MAC0SC (MAC0CF.5) bit description to correctly refer to the MAC0SD bit.
Changed the EMI0CF description to properly describe the 1k XRAM boundaries.
Specified that the undefined states for PLLLP3–0 are RESERVED.
Specified that the undefined states of CPS2–0 are RESERVED.
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