MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 51

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A timing diagram for TBI receive appears in
2.9.2.6
Table 35
Freescale Semiconductor
At recommended operating conditions with L/TV
.
Data to clock output skew (at transmitter)
Data to clock input skew (at receiver)
Clock period duration
Duty cycle for 1000BASE-T
Duty cycle for 10BASE-T and 100BASE-TX
Rise time (20%–80%)
Fall time (20%–80%)
Notes:
1. Note that, in general, the clock reference symbol representation for this section is based on the symbols RGT to
2. This implies that PC board design will require clocks to be routed such that an additional trace delay of greater than
3. For 10 and 100 Mbps, t
4. Duty cycle may be stretched/shrunk during speed changes or while transition to a received packet's clock domains as
represent RGMII and RTBI timing. For example, the subscript of t
also that the notation for rise (R) and fall (F) times follows the clock symbol that is being represented. For symbols
representing skews, the subscript is skew (SK) followed by the clock that is being skewed (RGT).
1.5 ns will be added to the associated clock signal.
long as the minimum duty cycle is not violated and stretching occurs for no more than three t
transitioned between.
presents the RGMII and RTBI AC timing specifications.
RX_CLK
RCG[9:0]
RGMII and RTBI AC Timing Specifications
Parameter/Condition
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
3
Figure 24. TBI Single-Clock Mode Receive AC Timing Diagram
RGT
4
t
TRRH
Table 35. RGMII and RTBI AC Timing Specifications
scales to 400 ns ± 40 ns and 40 ns ± 4 ns, respectively.
2
DD
t
TRR
Figure
of 2.5 V ± 5%.
3, 4
24.
t
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
TRRDV
valid data
t
t
t
t
Symbol
RGTH
RGTH
SKRGT_RX
SKRGT_TX
t
t
t
t
RGTR
RGTF
TRRDX
RGT
/t
/t
RGT
RGT
1
RGT
represents the TBI (T) receive (RX) clock. Note
t
TRRF
–500
Min
1.0
7.2
45
40
—
—
Typ
8.0
—
—
50
—
—
0
t
TRRR
RGT
of the lowest speed
Max
0.75
0.75
500
2.8
8.8
55
60
Unit
ps
ns
ns
ns
ns
%
%
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