MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 80

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SD2_REF_CLK/_B reference clock cycle time
SD2_REF_CLK/_B frequency tolerance
SD_REF_CLK/_B rise/fall time (80%-20%)
SD_REF_CLK/_B duty cycle (@50% X2VDD)
SD_REF_CLK/_B cycle to cycle clock jitter (period jitter)
SD_REF_CLK/_B phase jitter (peak-to-peak)
Note:
1. Only 100/125/150 MHz have been tested, other in between values will not work correctly with the rest of the system.
2. In a frequency band from 150 kHz to 15 MHz, at BER of 10E-12.
3. Total peak-to-peak deterministic jitter “Dj” should be less than or equal to 50 ps.
Serial ATA (SATA)
2.16.1
The AC requirements for the SATA reference clock are listed in
80
Requirements for SATA REF_CLK
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Ref_CLK
Parameter
Table 59. Reference Clock Input Requirements
Figure 49. Reference Clock Timing Waveform
t
CLK_RISE
T
L
t
t
t
CLK_DUTY
Symbol
CLK_REF
t
CLK_TOL
t
CLK_CJ
CLK_PJ
Table
/t
CLK_FALL
59.
T
H
–350
Min
100
–50
45
—
—
Typical
—
—
—
—
50
0
+350
Max
+50
150
100
Freescale Semiconductor
55
1
MHz
Unit
ppm
ns
ps
ps
%
Notes
2,3
—
—
—
—
1