DEMO9S08JM16 Freescale Semiconductor, DEMO9S08JM16 Datasheet - Page 26

• Manufacturer Part Number: DEMO9S08JM16
• Description: BOARD DEMO FOR JM16 FAMI
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08JM16

• Contents: Board with Daughter card, Cable, Documentation, Mini-AB USB Kit
• Processor To Be Evaluated: MC9S08JM16
• Data Bus Width: 8 bit
• Interface Type: USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: Flexis - S08JM
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08JM16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 2 Pins and Connections
26
NOTES:
1. External crystal circuity is not required if using the MCG internal clock option. For USB operation, an external crystal is required.
2. XTAL and EXTAL are the same pins as PTG4 and PTG5, respectively.
3. RC filters on RESET and IRQ are recommended for EMC-sensitive applications.
4. R
5. V
6. USBDP and USBDN are powered by the 3.3 V regulator.
V
The voltage regulator output is used for R
DD
PUDP
BUS
SYSTEM
POWER
NOTE 1
BACKGROUND HEADER
OPTIONAL
is a 5.0 V supply from upstream port that can be used for USB operation.
MANUAL
RESET
is shown for full-speed USB only. The diagram shows a configuration where the on-chip regulator and R
C1
USB SERIES-B CONNECTOR
5 V
+
IRQ/TPMCLK
10 μF
C
X1
BLK
3.3-V Reference
4.7 μF
V
+
R
DD
F
2
3
+
1
4
V
C2
DD
4.7 kΩ–10 kΩ
0.1 μF
C
Figure 2-4. Basic System Connections
0.1 μF
BY
V
R
MC9S08JM16 Series Data Sheet, Rev. 2
Bus
C
0.1 μF
S
BYAD
PUDP.
V
0.47 μF
DD
4.7 kΩ–
10 kΩ
0.1 μF
R
PUDP
V
USBDN
V
can optionally be disabled if using an external pullup resistor on USBDP
V
USB33
V
V
V
V
V
XTAL
USB33
EXTAL
V
REFL
REFH
DDAD
DD
SSAD
SS
SSOSC
R
BKGD/MS
PUDP
RESET
IRQ
USBDP
MC9S08JM16
PORT
PORT
PORT
PORT
PORT
PORT
PORT
B
C
D
E
G
A
F
PTA0, PTA5
PTB0/MISO2/ADP0
PTB1/MOSI2/ADP1
PTB2/SPSCK2/ADP2
PTB3/SS2/ADP3
PTB4/KBIP4/ADP4
PTB5/KBIP5/ADP5
PTC0/SCL
PTC1/SDA
PTC2
PTC3/TxD2
PTC4
PTC5/RxD2
PTD0/ADP8/ACMP+
PTD1/ADP9/ACMP–
PTD2/KBIP2/ACMPO
PTD7
PTE0/TxD1
PTE1/RxD1
PTE2/TPM1CH0
PTE3/TPM1CH1
PTE4/MISO1
PTE5/MOSI1
PTE6/SPSCK1
PTE7/SS1
PTF0/TPM1CH2
PTF1/TPM1CH3
PTF4/TPM2CH0
PTF5/TPM2CH1
PTF6
PTG0/KBIP0
PTG1/KBIP1
PTG2/KBIP6
PTG3/KBIP7
PTG4/XTAL
PTG5/EXTAL
Freescale Semiconductor
PUDP
are enabled.
INTERFACE TO
APPLICATION
PERIPHERAL
SYSTEM
I/O AND