PIC18F87J60-I/PT Microchip Technology, PIC18F87J60-I/PT Datasheet - Page 13

• Manufacturer Part Number: PIC18F87J60-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J60-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 55
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 55
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 15-ch x 10-bit
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 1-1:
© 2007 Microchip Technology Inc.
Note 1:
OSC2/CLKO
OSC1/CLKI
ENVREG
2:
See Table 1-4 for I/O port pin descriptions.
BOR functionality is provided when the on-board voltage regulator is enabled.
(64, 96, 128 Kbytes)
Instruction Bus <16>
Table Pointer<21>
Program Memory
V
Address Latch
DDCORE
Generation
Reference
ECCP1
Band Gap
inc/dec logic
Regulator
Precision
10-Bit
Data Latch
Oscillator
ADC
Voltage
PIC18F66J60/66J65/67J60 (64-PIN) BLOCK DIAGRAM
Timing
INTRC
21
/V
CAP
ECCP2
Timer0
20
8
V
DD
Start-up Timer
Decode and
,
Brown-out
V
ROM Latch
Instruction
Watchdog
Table Latch
Power-up
Oscillator
Power-on
Reset
SS
Control
Reset
Timer
Timer
PCLATU
PCU
Program Counter
IR
ECCP3
Timer1
31 Level Stack
(2)
STKPTR
MCLR
PCLATH
PCH
8
State Machine
Control Signals
Preliminary
PCL
Timer2
CCP4
Data Bus<8>
8
PIC18F97J60 FAMILY
Timer3
CCP5
BITOP
BSR
4
3
8
Data Address<12>
Address Latch
Address
Data Memory
Decode
(3808 Bytes)
MSSP1
FSR0
FSR1
FSR2
inc/dec
Timer4
Data Latch
logic
PRODH
8
ALU<8>
8 x 8 Multiply
12
W
12
8
8
Access
Bank
PRODL
Comparators
4
EUSART1
12
8
8
8
8
Ethernet
RC0:RC7
RD0:RD2
RA0:RA5
RB0:RB7
RE0:RE5
RF1:RF7
DS39762C-page 11
PORTD
PORTG
PORTA
PORTB
PORTC
PORTE
PORTF
RG4
(1)
(1)
(1)
(1)
(1)
(1)
(1)