PIC18F87J60-I/PT Microchip Technology, PIC18F87J60-I/PT Datasheet - Page 82

• Manufacturer Part Number: PIC18F87J60-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J60-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 55
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 55
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 15-ch x 10-bit
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
5.3.5
In addition to the standard SFR set in Bank 15,
members of the PIC18F97J60 family have a second
set of SFRs. This group, associated exclusively with
the Ethernet module, occupies the top half of Bank 14
(E80h to EFFh).
TABLE 5-4:
DS39762C-page 80
Note 1:
Address
EEDh
EECh
EFDh
EFCh
EEEh
EEBh
EEAh
EFFh
EFEh
EFBh
EFAh
EEFh
EE9h
EE8h
EE7h
EE6h
EE5h
EE4h
EE3h
EE2h
EE1h
EE0h
EF9h
EF8h
EF7h
EF6h
EF5h
EF4h
EF3h
EF2h
EF1h
EF0h
2:
Reserved register location; do not modify.
Unimplemented registers are read as ‘0’.
ETHERNET SFRs
ERXWRPTH
EDMADSTH
ERXWRPTL
ERXRDPTH
EDMADSTL
ERXRDPTL
EDMANDH
EDMACSH
EDMANDL
EDMASTH
EDMACSL
EDMASTL
EWRPTH
ERXNDH
ETXNDH
EWRPTL
ERXNDL
ERXSTH
ERXSTL
ETXNDL
ETXSTH
ETXSTL
ECON2
ESTAT
ETHERNET SFR MAP FOR PIC18F97J60 FAMILY DEVICES
Name
—
—
—
—
—
—
—
EIE
(1)
(1)
(1)
(2)
(2)
(1)
(1)
Address
EDDh
EDCh
ECDh
ECCh
EDEh
EDBh
EDAh
ECEh
ECBh
ECAh
EDFh
ECFh
ED9h
ED8h
ED7h
ED6h
ED5h
ED4h
ED3h
ED2h
ED1h
ED0h
EC9h
EC8h
EC7h
EC6h
EC5h
EC4h
EC3h
EC2h
EC1h
EC0h
ERXFCON
EPKTCNT
EPMCSH
EPMCSL
EPMOH
EPMOL
EPMM7
EPMM6
EPMM5
EPMM4
EPMM3
EPMM2
EPMM1
EPMM0
Name
EHT7
EHT6
EHT5
EHT4
EHT3
EHT2
EHT1
EHT0
—
—
—
—
—
—
—
—
—
—
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(2)
Preliminary
Address
A complete list of Ethernet SFRs is given in Table 5-4.
All SFRs are fully described in Table 5-5
EBDh
EBCh
EADh
EACh
EBEh
EBBh
EBAh
EAEh
EABh
EAAh
EBFh
EB9h
EB8h
EB7h
EB6h
EB5h
EB4h
EB3h
EB2h
EB1h
EB0h
EAFh
EA9h
EA8h
EA7h
EA6h
EA5h
EA4h
EA3h
EA2h
EA1h
EA0h
Note:
MIREGADR
MAMXFLH
MAMXFLL
MABBIPG
To
accessed Ethernet registers are located in
the standard SFR bank (F60h through
FFFh).
MACON4
MACON3
MACON1
MAIPGH
MAIPGL
MIWRH
MICMD
MIRDH
MIWRL
MIRDL
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(1)
(1)
(2)
(1)
(1)
(1)
(1)
(1)
(2)
(1)
improve
© 2007 Microchip Technology Inc.
Address
performance,
E9Dh
E9Ch
E8Dh
E8Ch
E9Fh
E9Eh
E9Bh
E9Ah
E8Fh
E8Eh
E8Bh
E8Ah
E99h
E98h
E97h
E96h
E95h
E94h
E93h
E92h
E91h
E90h
E89h
E88h
E87h
E86h
E85h
E84h
E83h
E82h
E81h
E80h
EFLOCON
MAADR2
MAADR1
MAADR4
MAADR3
MAADR6
MAADR5
EPAUSH
EPAUSL
MISTAT
Name
frequently
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)