PIC18F87J60-I/PT Microchip Technology, PIC18F87J60-I/PT Datasheet - Page 463

• Manufacturer Part Number: PIC18F87J60-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J60-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 55
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 55
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 15-ch x 10-bit
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DC Characteristics ........................................................... 423
DCFSNZ .......................................................................... 379
DECF ............................................................................... 378
DECFSZ ........................................................................... 379
Default System Clock ......................................................... 44
Development Support ...................................................... 409
Device Differences ........................................................... 457
Device Overview .................................................................. 7
Direct Addressing ............................................................... 89
E
ECCP2
Effect on Standard PIC Instructions ................................. 406
Electrical Characteristics .................................................. 413
Enhanced Capture/Compare/PWM (ECCP) .................... 189
Enhanced Universal Synchronous Asynchronous
ENVREG pin .................................................................... 354
Equations
Errata ................................................................................... 6
Ethernet Module ............................................................... 205
© 2007 Microchip Technology Inc.
Power-Down and Supply Current ............................ 416
Supply Voltage ......................................................... 415
Details on Individual Family Members ......................... 8
Features (100-Pin Devices) ....................................... 10
Features (64-Pin Devices) ........................................... 9
Features (80-Pin Devices) ........................................... 9
Pin Assignment ........................................................ 182
Requirements for Ethernet Transceiver
Associated Registers ............................................... 204
Capture and Compare Modes .................................. 192
Capture Mode. See Capture (ECCP Module).
ECCP1/ECCP3 Outputs and
ECCP2 Outputs and Program
Enhanced PWM Mode ............................................. 193
Outputs and Configuration ....................................... 190
Pin Configurations for ECCP1 ................................. 191
Pin Configurations for ECCP2 ................................. 191
Pin Configurations for ECCP3 ................................. 192
PWM Mode. See PWM (ECCP Module).
Standard PWM Mode ............................................... 192
Timer Resources ...................................................... 190
Use of CCP4/CCP5 with ECCP1/ECCP3 ................ 190
Receiver Transmitter (EUSART). See EUSART.
A/D Acquisition Time ................................................ 330
A/D Minimum Charging Time ................................... 330
Calculating the A/D Minimum Required
Random Access Address Calculation ...................... 239
Receive Buffer Free Space Calculation ................... 240
Associated Registers, Direct Memory
Associated Registers, Flow Control ......................... 244
Associated Registers, Reception ............................. 241
Associated Registers, Transmission ........................ 241
Buffer and Buffer Pointers ........................................ 209
Buffer and Register Spaces ..................................... 208
Buffer Organization .................................................. 210
CRC ......................................................................... 234
External Magnetics .......................................... 447
Program Memory Mode ................................... 190
Memory Modes ................................................ 190
Acquisition Time .............................................. 330
Access Controller ............................................. 252
Buffer Arbiter .................................................... 212
DMA Access .................................................... 212
Receive Buffer ................................................. 211
Transmit Buffer ................................................ 212
Preliminary
PIC18F97J60 FAMILY
Ethernet Operation, Microcontroller Clock ......................... 41
EUSARTx
Direct Memory Access Controller ............................ 251
Disabling .................................................................. 232
Duplex Mode Configuration and Negotiation ........... 242
Ethernet and Microcontroller
Ethernet Control Registers ...................................... 213
Flow Control ............................................................ 243
Initializing ................................................................. 231
Interrupts ................................................................. 225
Interrupts and Wake-on-LAN ................................... 230
LED Configuration ................................................... 206
MAC and MII Registers ........................................... 215
Magnetics, Termination and Other
Oscillator Requirements .......................................... 206
Packet Format ......................................................... 233
Per-Packet Control Bytes ........................................ 235
PHSTAT Registers .................................................. 218
PHY Register Summary .......................................... 220
PHY Registers ......................................................... 218
PHY Start-up Timer ................................................. 206
Receive Filters ......................................................... 245
Resets ..................................................................... 253
Signal and Power Interfaces .................................... 206
Special Function Registers (SFRs) ......................... 213
Transmitting and Receiving Data ............................ 233
Asynchronous Mode ................................................ 311
Baud Rate Generator
Baud Rate Generator (BRG) ................................... 305
Checksum Calculations ................................... 252
Copying Memory ............................................. 251
Memory Relationship ....................................... 208
External Components ...................................... 207
Broadcast ........................................................ 245
Hash Table ...................................................... 245
Magic Packet ................................................... 245
Multicast .......................................................... 245
Pattern Match .................................................. 245
Unicast ............................................................ 245
Microcontroller Reset ....................................... 253
Receive Only ................................................... 253
Transmit Only .................................................. 253
Packet Field Definitions ........................... 233–234
Reading Received Packets ............................. 239
Receive Buffer Space ...................................... 240
Receive Packet Layout .................................... 238
Receive Status Vectors ................................... 239
Receiving Packets ........................................... 238
Transmit Packet Layout ................................... 236
Transmit Status Vectors .................................. 237
Transmitting Packets ....................................... 235
Associated Registers, Receive ........................ 315
Associated Registers, Transmit ....................... 313
Auto-Wake-up on Sync Break Character ........ 316
Break Character Sequence ............................. 318
Receiver .......................................................... 314
Setting Up 9-Bit Mode with Address Detect .... 314
Transmitter ...................................................... 311
Operation in Power-Managed Modes .............. 305
Associated Registers ....................................... 306
Auto-Baud Rate Detect .................................... 309
Baud Rate Error, Calculating ........................... 306
Baud Rates, Asynchronous Modes ................. 307
High Baud Rate Select (BRGH Bit) ................. 305
Sampling ......................................................... 305
Receiving ................................................. 318
DS39762C-page 461