PIC18F87J60-I/PT Microchip Technology, PIC18F87J60-I/PT Datasheet - Page 86

• Manufacturer Part Number: PIC18F87J60-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J60-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 55
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 55
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 15-ch x 10-bit
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
TABLE 5-5:
DS39762C-page 84
PORTF
PORTE
PORTD
PORTC
PORTB
PORTA
SPBRGH1
BAUDCON1
SPBRGH2
BAUDCON2
ERDPTH
ERDPTL
ECCP1DEL
TMR4
PR4
T4CON
CCPR4H
CCPR4L
CCP4CON
CCPR5H
CCPR5L
CCP5CON
SPBRG2
RCREG2
TXREG2
TXSTA2
RCSTA2
ECCP3AS
ECCP3DEL
ECCP2AS
ECCP2DEL
SSP2BUF
SSP2ADD
SSP2STAT
SSP2CON1
SSP2CON2
EDATA
EIR
ECON2
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’, q = value depends on condition, r = reserved bit, do not modify. Shaded cells
Note 1:
File Name
2:
3:
4:
5:
6:
7:
8:
9:
are unimplemented, read as ‘0’.
Bit 7 and bit 6 are cleared by user software or by a POR.
Bit 21 of the PC is only available in Serial Programming modes.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
Alternate names and definitions for these bits when the MSSP module is operating in I
These bits and/or registers are only available in 100-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values shown
apply only to 100-pin devices.
These bits and/or registers are only available in 80-pin and 100-pin devices; in 64-pin devices, they are unimplemented and read as ‘0’. Reset
values are shown for 100-pin devices.
In Microcontroller mode, the bits in this register are unwritable and read as ‘0’.
PLLEN is only available when either ECPLL or HSPLL Oscillator mode is selected; otherwise, read as ‘0’.
Implemented in 100-pin devices in Microcontroller mode only.
EUSART1 Baud Rate Generator Register High Byte
EUSART2 Baud Rate Generator Register High Byte
Buffer Read Pointer Low Byte
Timer4 Register
Timer4 Period Register
Capture/Compare/PWM Register 4 High Byte
Capture/Compare/PWM Register 4 Low Byte
Capture/Compare/PWM Register 5 High Byte
Capture/Compare/PWM Register 5 Low Byte
EUSART2 Baud Rate Generator Register Low Byte
EUSART2 Receive Register
EUSART2 Transmit Register
ECCP3ASE ECCP3AS2 ECCP3AS1 ECCP3AS0
ECCP2ASE ECCP2AS2 ECCP2AS1 ECCP2AS0
MSSP2 Receive Buffer/Transmit Register
MSSP2 Address Register (I
Ethernet Transmit/Receive Buffer Register (EDATA<7:0>)
AUTOINC
ABDOVF
ABDOVF
P1RSEN
P3RSEN
P2RSEN
RJPU
RE7
RD7
WCOL
CSRC
SPEN
GCEN
GCEN
Bit 7
SMP
RF7
RC7
RB7
—
—
—
—
—
(6)
(5)
REGISTER FILE SUMMARY (PIC18F97J60 FAMILY) (CONTINUED)
(6)
T4OUTPS3
ACKSTAT
ACKSTAT
PKTDEC
SSPOV
P1DC6
P3DC6
P2DC6
RD6
RCIDL
RCIDL
RE6
PKTIF
Bit 6
RC6
RB6
RX9
CKE
RF6
TX9
—
—
—
—
(6)
(5)
2
T4OUTPS2
ADMSK5
C™ Slave mode), MSSP2 Baud Rate Reload Register (I
RXDTP
RXDTP
SSPEN
ACKDT
ETHEN
P1DC5
DC4B1
DC5B1
P3DC5
P2DC5
DMAIF
RD5
TXEN
SREN
Bit 5
RC5
RF5
RE5
RB5
RA5
D/A
—
(5)
(4)
Buffer Read Pointer High Byte
T4OUTPS1
ADMSK4
TXCKP
TXCKP
ACKEN
P1DC4
DC4B0
DC5B0
P3DC4
P2DC4
LINKIF
RD4
CREN
SYNC
Bit 4
RE4
RC4
RB4
RA4
CKP
RF4
—
P
(5)
Preliminary
(4)
T4OUTPS0
ADMSK3
PSS3AC1
PSS2AC1
CCP4M3
CCP5M3
ADDEN
SENDB
SSPM3
BRG16
BRG16
P1DC3
P3DC3
P2DC3
RD3
RCEN
Bit 3
TXIF
RC3
RF3
RE3
RB3
RA3
—
S
(5)
(4)
ADMSK2
PSS3AC0
PSS2AC0
TMR4ON
CCP4M2
CCP5M2
SSPM2
P1DC2
P3DC2
P2DC2
BRGH
FERR
Bit 2
RD2
RC2
PEN
RF2
RE2
RB2
RA2
R/W
—
—
—
—
(4)
2
C™ Slave mode.
ADMSK1
T4CKPS1
PSS3BD1
PSS2BD1
2
CCP4M1
CCP5M1
C Master mode)
TXERIF
SSPM1
P1DC1
P3DC1
P2DC1
OERR
TRMT
RSEN
WUE
WUE
Bit 1
RD1
RC1
RF1
RE1
RB1
RA1
UA
—
(4)
© 2007 Microchip Technology Inc.
T4CKPS0
PSS3BD0
PSS2BD0
CCP4M0
CCP5M0
RXERIF
ABDEN
ABDEN
SSPM0
P1DC0
P3DC0
P2DC0
RF0
RX9D
TX9D
Bit 0
RD0
RC0
SEN
SEN
RE0
RB0
RA0
BF
—
(5)
0000 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0-0x 0000
0000 0000
0100 0-00
0000 0000
0100 0-00
---0 0101
1111 1010
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
-000 0-00
100- ----
POR, BOR
Values on
Details on
63, 257,
62, 151
62, 149
62, 146
62, 143
62, 140
62, 137
62, 306
62, 304
62, 306
62, 304
62, 209
62, 209
62, 200
62, 179
62, 179
62, 179
62, 185
62, 185
63, 181
63, 185
63, 185
63, 181
63, 306
63, 313
63, 315
63, 302
63, 303
63, 201
63, 200
63, 201
63, 200
63, 265
63, 265
63, 256
63, 268
63, 209
63, 227
63, 214
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