DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 309

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.3.6
The TCNT registers are 16-bit counters. The TPU has three TCNT counters, one for each channel.
The TCNT counters are initialized to H'0000 by a reset. The TCNT counters cannot be accessed in
8-bit units; they must always be accessed as a 16-bit unit.
10.3.7
The TGR registers are 16-bit registers with a dual function as output compare and input capture
registers. The TPU has 16 TGR registers, four for channel 0 and two each for channels 1 and 2.
TGRC and TGRD for channel 0 can also be designated for operation as buffer registers. The TGR
registers are initialized to H'FFFF by a reset. The TGR registers cannot be accessed in 8-bit units;
they must always be accessed as a 16-bit unit. TGR buffer register combinations are TGRA—
TGRC and TGRB—TGRD.
10.3.8
TSTR is an 8-bit readable/writable register that selects operation/stoppage for channels 0 to 2.
TCNT of a channel performs counting when the corresponding bit in TSTR is set to 1. When
setting the operating mode in TMDR or setting the count clock in TCR, first stop the TCNT
counter.
Bit
7 to 3
2
1
0
Bit Name
⎯
CST2
CST1
CST0
Timer Counter (TCNT)
Timer General Register (TGR)
Timer Start Register (TSTR)
Initial
value
All 0
0
0
0
R/W
R
R/W
R/W
R/W
Description
Reserved
The initial value should not be changed.
Counter Start 2 to 0 (CST2 to CST0)
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but
the TIOC pin output compare output level is retained.
If TIOR is written to when the CST bit is cleared to 0,
the pin output level will be changed to the set initial
output value.
0: TCNT_n count operation is stopped
1: TCNT_n performs count operation
(n = 2 to 0)
Rev. 3.00 Sep. 28, 2009 Page 263 of 910
Section 10 16-Bit Timer Pulse Unit (TPU)
REJ09B0350-0300