DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 772

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 Flash Memory
Error protection is canceled by a reset. Note that the reset should be released after the reset input
period of at least 100μs has passed. Since high voltages are applied during programming/erasing
of the flash memory, some voltage may remain after the error protection state has been entered.
For this reason, it is necessary to reduce the risk of damaging the flash memory by extending the
reset input period so that the charge is released.
The state-transition diagram in figure 22.16 shows transitions to and from the error protection
state.
Rev. 3.00 Sep. 28, 2009 Page 726 of 910
REJ09B0350-0300
Error occurrence
Programming/erasing enabled
Programming/erasing
Programming/erasing disabled
Read disabled
Error-protection mode
FLER = 0
mode
Read enabled
FLER = 1
Figure 22.16 Transitions to Error Protection State
Software standby mode
software standby mode
RES = 0
Cancel
Programming/erasing interface
register is in its initial state.
Programming/erasing disabled
Error-protection mode
RES = 0
(software standby)
Read disabled
Programming/erasing disabled
FLER = 1
(hardware protection)
Read disabled
FLER = 0
Reset
Programming/erasing interface
register is in its initial state.