DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 816

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 24 Power-Down Modes
24.1.2
LPWRCR controls power-down modes.
Rev. 3.00 Sep. 28, 2009 Page 770 of 910
REJ09B0350-0300
Bit
7
6
5
4
3 to 0
Low-Power Control Register (LPWRCR)
Bit Name
DTON
LSON
NESEL
EXCLE
⎯
Initial
Value
0
0
0
0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Direct Transfer On Flag
The initial value should not be changed.
Low-Speed On Flag
The initial value should not be changed.
Noise Elimination Sampling Frequency Select
Selects the frequency by which the subclock (φSUB)
input from the EXCL or ExEXCL pin is sampled using
the clock (φ) generated by the system clock pulse
generator. Clear this bit to 0 when φ is 5 MHz or more.
The initial value should not be changed.
0: Sampling using φ/32 clock
1: Sampling using φ/4 clock (not allowed)
Subclock Input Enable
Enables or disables subclock input from the EXCL or
ExEXCL pin.
0: Disables subclock input from the EXCL or ExEXCL
1: Enables subclock input from the EXCL or ExEXCL
Reserved
The initial value should not be changed.
pin
pin