AT90USB1287-AU Atmel, AT90USB1287-AU Datasheet - Page 328

IC AVR MCU 128K 64TQFP

AT90USB1287-AU

Manufacturer Part Number
AT90USB1287-AU
Description
IC AVR MCU 128K 64TQFP
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheets

Specifications of AT90USB1287-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
AT90USBx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATSTK525, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525, ATAVRQTOUCHX
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
AVR USB
No. Of I/o's
48
Eeprom Memory Size
4KB
Ram Memory Size
8KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT90USB1287-16AU
AT90USB1287-16AU

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25.8.2
328
AT90USB64/128
ADC Control and Status Register A – ADCSRA
Table 25-4.
• Bit 7 – ADEN: ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the
ADC off while a conversion is in progress, will terminate this conversion.
• Bit 6 – ADSC: ADC Start Conversion
In Single Conversion mode, write this bit to one to start each conversion. In Free Running mode,
write this bit to one to start the first conversion. The first conversion after ADSC has been written
after the ADC has been enabled, or if ADSC is written at the same time as the ADC is enabled,
Bit
Read/Write
Initial Value
MUX4..0
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
Single Ended
Input
N/A
1.1V (V
0V (GND)
ADEN
R/W
Input Channel and Gain Selections (Continued)
7
0
Band Gap
ADSC
R/W
6
0
)
ADATE
R/W
Positive Differential
Input
(ADC0 / ADC0 / 10x)
ADC1
(ADC0 / ADC0 / 200x)
ADC1
(Reserved - ADC2 / ADC2 / 10x)
ADC3
(ADC2 / ADC2 / 200x)
ADC3
ADC0
(ADC1 / ADC1 / 1x)
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADC0
ADC1
(ADC2 / ADC2 / 1x)
ADC3
ADC4
ADC5
N/A
5
0
ADIF
R/W
4
0
ADIE
R/W
3
0
ADPS2
R/W
Negative Differential
Input
ADC0
ADC0
ADC2
ADC2
ADC1
ADC1
ADC1
ADC1
ADC1
ADC1
ADC1
ADC2
ADC2
ADC2
ADC2
ADC2
2
0
ADPS1
R/W
1
0
ADPS0
R/W
0
0
ADCSRA
Gain
10x
200x
10x
200x
1x
1x
1x
1x
1x
1x
1x
1x
1x
1x
1x
1x
7593K–AVR–11/09

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