ST7FLITE49K2T6 STMicroelectronics, ST7FLITE49K2T6 Datasheet - Page 52

IC MCU 8BIT 8K FLASH 32LQFP

ST7FLITE49K2T6

Manufacturer Part Number
ST7FLITE49K2T6
Description
IC MCU 8BIT 8K FLASH 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITE49K2T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FLITE4x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
For Use With
497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Supply, reset and clock management
7.5.4
52/245
Bit 0 = AVDIE Voltage detector interrupt enable bit
AVD threshold selection register (AVDTHCR)
Bits 7:5 = CK[2:0] internal RC prescaler selection
Table 11.
Bits 4:2 = Reserved, must be cleared.
Bits 1:0 = AVD[1:0] AVD Threshold selection. These bits are used to select the AVD
threshold. They are set and cleared by software. They are set by hardware after a reset.
Table 12.
Reset value: 0000 0011 (003h)
CK2
CK2
AVD1
7
0
0
0
1
This bit is set and cleared by software. It enables an interrupt to be generated when the
AVDF flag is set. The pending interrupt information is automatically cleared when
software enters the AVD interrupt routine.
0: AVD interrupt disabled
1: AVD interrupt enabled
These bits are set by software and cleared by hardware after a reset. These bits select
the prescaler of the internal RC oscillator. See
diagram on page 41
If the internal RC is used with a supply operating range below 3.3 V, a division ratio of
at least 2 must be enabled in the RC prescaler.
0
0
1
1
Internal RC prescaler selection bits
others
AVD threshold selection bits
CK1
CK1
AVD0
0
1
1
0
0
1
0
1
CK0
CK0
and
1
0
1
0
Table
0
11.
Read/write
0
Functionality
Figure 13: Clock management block
Medium
AVD off
High
Low
f
f
f
f
f
RC/16
RC/2
RC/4
RC/8
OSC
f
0
RC
AVD1
ST7LITE49K2
AVD0
0

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