ST7FLITE49K2T6 STMicroelectronics, ST7FLITE49K2T6 Datasheet - Page 79

IC MCU 8BIT 8K FLASH 32LQFP

ST7FLITE49K2T6

Manufacturer Part Number
ST7FLITE49K2T6
Description
IC MCU 8BIT 8K FLASH 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITE49K2T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FLITE4x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
For Use With
497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ST7LITE49K2
10.6
10.7
10.7.1
10.7.2
Interrupts
The external interrupt event generates an interrupt if the corresponding configuration is
selected with DDR and OR registers and if the I bit in the CC register is cleared (RIM
instruction).
Table 27.
See application notes AN1045 software implementation of
software LCD driver
Device-specific I/O port configuration
The I/O port register configurations are summarized in
Section 10.7.2: Other
Standard ports
Table 28.
Other ports
Table 29.
Table 30.
M
External interrupt on selected
Interrupt event
external event
Description of interrupt events
PA5:0, PB7:0, PC7:4 and PC2:0 pins
PA7:6 pins
PC3 pin
pull-up interrupt input
ports.
open drain output
open drain output
push-pull output
push-pull output
interrupt input
floating input
floating input
floating input
pull-up input
Mode
Mode
Mode
Event flag
-
control bit
Enable
DDRx
ORx
Section 10.7.1: Standard ports
I
2
C
bus master, and AN1048 -
Exit from
DDR
DDR
DDR
0
0
1
1
0
0
1
1
0
0
Wait
Yes
Exit from
OR
OR
OR
I/O ports
Halt
Yes
0
1
0
1
0
1
0
1
0
1
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