C8051F352-GQR Silicon Laboratories Inc, C8051F352-GQR Datasheet - Page 122

IC 8051 MCU 8K FLASH 32LQFP

C8051F352-GQR

Manufacturer Part Number
C8051F352-GQR
Description
IC 8051 MCU 8K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Datasheets

Specifications of C8051F352-GQR

Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x16b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Core
8051
Processor Series
C8051F3x
Data Bus Width
8 bit
Maximum Clock Frequency
50 MHz
Data Ram Size
768 B
Data Rom Size
128 B
On-chip Adc
Yes
Number Of Programmable I/os
17
Number Of Timers
4 bit
Operating Supply Voltage
2.7 V to 3.6 V
Mounting Style
SMD/SMT
A/d Bit Size
16 bit
A/d Channels Available
8
Height
1.4 mm
Interface Type
I2C, SMBus, SPI, UART
Length
7 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
7 mm
For Use With
336-1083 - DEV KIT FOR F350/351/352/353
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F352-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F352-GQR..
Manufacturer:
SILICON
Quantity:
15 000
C8051F350/1/2/3
15.1.3. Flash Write Procedure
Bytes in Flash memory can be written one byte at a time, or in groups of two. The FLBWE bit in register
PFE0CN (SFR Definition 13.1) controls whether a single byte or a block of two bytes is written to Flash
during a write operation. When FLBWE is cleared to ‘0’, the Flash will be written one byte at a time. When
FLBWE is set to ‘1’, the Flash will be written in two-byte blocks. Block writes are performed in the same
amount of time as single-byte writes, which can save time when storing large amounts of data to Flash
memory.
During a single-byte write to Flash, bytes are written individually, and a Flash write will be performed after
each MOVX write instruction. The recommended procedure for writing Flash in single bytes is:
Steps 5–7 must be repeated for each byte to be written.
For block Flash writes, the Flash write procedure is only performed after the last byte of each block is writ-
ten with the MOVX write instruction. A Flash write block is two bytes long, from even addresses to odd
addresses. Writes must be performed sequentially (i.e. addresses ending in 0b and 1b must be written in
order). The Flash write will be performed following the MOVX write that targets the address ending in 1b. If
a byte in the block does not need to be updated in Flash, it should be written to 0xFF. The recommended
procedure for writing Flash in blocks is:
Steps 5–10 must be repeated for each block to be written.
122
Step 1. Disable interrupts.
Step 2. Clear the FLBWE bit (register PFE0CN) to select single-byte write mode.
Step 3. Set the PSWE bit (register PSCTL).
Step 4. Clear the PSEE bit (register PSCTL).
Step 5. Write the first key code to FLKEY: 0xA5.
Step 6. Write the second key code to FLKEY: 0xF1.
Step 7. Using the MOVX instruction, write a single data byte to the desired location within the 512-
Step 8. Clear the PSWE bit.
Step 9. Re-enable interrupts.
Step 1. Disable interrupts.
Step 2. Set the FLBWE bit (resgister PFE0CN) to select block write mode.
Step 3. Set the PSWE bit (register PSCTL).
Step 4. Clear the PSEE bit (register PSCTL).
Step 5. Write the first key code to FLKEY: 0xA5.
Step 6. Write the second key code to FLKEY: 0xF1.
Step 7. Using the MOVX instruction, write the first data byte to the even block location (ending in
Step 8. Write the first key code to FLKEY: 0xA5.
Step 9. Write the second key code to FLKEY: 0xF1.
Step 10. Using the MOVX instruction, write the second data byte to the odd block location (ending
Step 11. Clear the PSWE bit.
Step 12. Re-enable interrupts.
0b).
in 1b).
byte sector.
Rev. 1.1

Related parts for C8051F352-GQR