C8051F352-GQR Silicon Laboratories Inc, C8051F352-GQR Datasheet - Page 5

• Manufacturer Part Number: C8051F352-GQR
• Description: IC 8051 MCU 8K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F35xr

Specifications of C8051F352-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x16b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Core: 8051
• Processor Series: C8051F3x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 50 MHz
• Data Ram Size: 768 B
• Data Rom Size: 128 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 17
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 16 bit
• A/d Channels Available: 8
• Height: 1.4 mm
• Interface Type: I2C, SMBus, SPI, UART
• Length: 7 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Width: 7 mm
• For Use With: 336-1083 - DEV KIT FOR F350/351/352/353
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18. Port Input/Output.................................................................................................. 137
19. SMBus ................................................................................................................... 151
20. UART0.................................................................................................................... 171
21. Serial Peripheral Interface (SPI0) ........................................................................ 181
17.3.Clock Multiplier ............................................................................................... 135
17.4.System Clock Selection.................................................................................. 136
18.1.Priority Crossbar Decoder .............................................................................. 139
18.2.Port I/O Initialization ....................................................................................... 141
18.3.General Purpose Port I/O ............................................................................... 144
19.1.Supporting Documents ................................................................................... 152
19.2.SMBus Configuration...................................................................................... 152
19.3.SMBus Operation ........................................................................................... 152
19.4.Using the SMBus............................................................................................ 155
19.5.SMBus Transfer Modes.................................................................................. 163
19.6.SMBus Status Decoding................................................................................. 167
20.1.Enhanced Baud Rate Generation................................................................... 172
20.2.Operational Modes ......................................................................................... 173
20.3.Multiprocessor Communications .................................................................... 174
21.1.Signal Descriptions......................................................................................... 182
21.2.SPI0 Master Mode Operation ......................................................................... 183
21.3.SPI0 Slave Mode Operation ........................................................................... 185
21.4.SPI0 Interrupt Sources ................................................................................... 185
21.5.Serial Clock Timing......................................................................................... 186
21.6.SPI Special Function Registers ...................................................................... 186
17.2.2.External Crystal Example....................................................................... 131
17.2.3.External RC Example............................................................................. 133
17.2.4.External Capacitor Example................................................................... 133
19.3.1.Arbitration............................................................................................... 153
19.3.2.Clock Low Extension.............................................................................. 154
19.3.3.SCL Low Timeout................................................................................... 154
19.3.4.SCL High (SMBus Free) Timeout .......................................................... 154
19.4.1.SMBus Configuration Register............................................................... 156
19.4.2.SMB0CN Control Register ..................................................................... 159
19.4.3.Data Register ......................................................................................... 162
19.5.1.Master Transmitter Mode ....................................................................... 163
19.5.2.Master Receiver Mode ........................................................................... 164
19.5.3.Slave Receiver Mode ............................................................................. 165
19.5.4.Slave Transmitter Mode ......................................................................... 166
20.2.1.8-Bit UART ............................................................................................. 173
20.2.2.9-Bit UART ............................................................................................. 174
21.1.1.Master Out, Slave In (MOSI).................................................................. 182
21.1.2.Master In, Slave Out (MISO).................................................................. 182
21.1.3.Serial Clock (SCK) ................................................................................. 182
21.1.4.Slave Select (NSS) ................................................................................ 182
Rev. 1.1
C8051F350/1/2/3
5