C8051F352-GQR Silicon Laboratories Inc, C8051F352-GQR Datasheet - Page 131

• Manufacturer Part Number: C8051F352-GQR
• Description: IC 8051 MCU 8K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F35xr

Specifications of C8051F352-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x16b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Core: 8051
• Processor Series: C8051F3x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 50 MHz
• Data Ram Size: 768 B
• Data Rom Size: 128 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 17
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 16 bit
• A/d Channels Available: 8
• Height: 1.4 mm
• Interface Type: I2C, SMBus, SPI, UART
• Length: 7 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Width: 7 mm
• For Use With: 336-1083 - DEV KIT FOR F350/351/352/353
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

17.2. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crys-
tal/resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 17.1. A
10 MΩ resistor also must be wired across the XTAL1 and XTAL2 pins for the crystal/resonator configura-
tion. In RC, capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 pin as
shown in Option 2, 3, or 4 of Figure 17.1. The type of external oscillator must be selected in the OSCXCN
register, and the frequency control bits (XFCN) must be selected appropriately (see SFR Definition 17.3)
Important Note on External Oscillator Usage: Port pins must be configured when using the external
oscillator circuit. When the external oscillator drive circuit is enabled in crystal/resonator mode, Port pins
P0.2 and P0.3 are used as XTAL1 and XTAL2 respectively. When the external oscillator drive circuit is
enabled in capacitor, RC, or CMOS clock mode, Port pin P0.3 is used as XTAL2. The Port I/O Crossbar
should be configured to skip the Port pins used by the oscillator circuit; see Section “18.1. Priority Crossbar
Decoder’ on page 139 for Crossbar configuration. Additionally, when using the external oscillator circuit in
crystal/resonator, capacitor, or RC mode, the associated Port pins should be configured as analog inputs.
In CMOS clock mode, the associated pin should be configured as a digital input. See Section “18.2. Port
I/O Initialization’ on page 141 for details on Port input mode selection.
17.2.1. Clocking Timers Directly Through the External Oscillator
The external oscillator source divided by eight is a clock option for the timers (Section “22. Timers’ on
page 195) and the Programmable Counter Array (PCA) (Section “23. Programmable Counter Array’ on
page 211). When the external oscillator is used to clock these peripherals, but is not used as the system
clock, the external oscillator frequency must be less than or equal to the system clock frequency. In this
configuration, the clock supplied to the peripheral (external oscillator / 8) is synchronized with the system
clock; the jitter associated with this synchronization is limited to ±0.5 system clock cycles.
17.2.2. External Crystal Example
If a crystal or ceramic resonator is used as an external oscillator source for the MCU, the circuit should be
configured as shown in Figure 17.1, Option 1. The External Oscillator Frequency Control value (XFCN)
should be chosen from the Crystal column of the table in SFR Definition 17.3 (OSCXCN register). For
example, a 12 MHz crystal requires an XFCN setting of 111b.
When the crystal oscillator is first enabled, the oscillator amplitude detection circuit requires a settling time
to achieve proper bias. Introducing a delay of 1 ms between enabling the oscillator and checking the
XTLVLD bit will prevent a premature switch to the external oscillator as the system clock. Switching to the
external oscillator before the crystal oscillator has stabilized can result in unpredictable behavior. The rec-
ommended procedure is:
Note: Tuning-fork crystals may require additional settling time before XTLVLD returns a valid result.
Step 1. Force the XTAL1 and XTAL2 pins low by writing 0’s to the port latch.
Step 2. Configure XTAL1 and XTAL2 as analog inputs.
Step 3. Enable the external oscillator.
Step 4. Wait at least 1 ms.
Step 5. Poll for XTLVLD => ‘1’.
Step 6. Switch the system clock to the external oscillator.
Rev. 1.1
C8051F350/1/2/3
131