C8051F352-GQR Silicon Laboratories Inc, C8051F352-GQR Datasheet - Page 74

• Manufacturer Part Number: C8051F352-GQR
• Description: IC 8051 MCU 8K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F35xr

Specifications of C8051F352-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x16b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Core: 8051
• Processor Series: C8051F3x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 50 MHz
• Data Ram Size: 768 B
• Data Rom Size: 128 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 17
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 16 bit
• A/d Channels Available: 8
• Height: 1.4 mm
• Interface Type: I2C, SMBus, SPI, UART
• Length: 7 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Width: 7 mm
• For Use With: 336-1083 - DEV KIT FOR F350/351/352/353
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

C8051F350/1/2/3
74
NOTE: Modification of this register is not necessary in most applications. The appropriate circuitry is
Bits7–2: Unused. Read = 000000b; Write = don’t care.
Bit1:
Bit0:
Bit7
—
R
enabled when it is needed by a peripheral.
BIASE: Internal Oscillator Bias Enable.
This bit is ORed with the Internal Oscillator Enable bit to enable the internal oscillator bias
generator.
0: Internal Oscillator Bias enable determined by Internal Oscillator Enable bit.
1: Internal Oscillator Bias Generator On.
REFBE: Internal Reference Bias Enable Bit.
This bit is ORed with the Enable bits for ADC0, IDAC0, IDAC1, and the Clock Multiplier to
enable the internal bandgap generator.
0: Internal Reference Bias enable determined by individual component.
1: Internal Reference Bias enabled.
Bit6
—
R
SFR Definition 7.1. REF0CN: Reference Control
Bit5
—
R
Bit4
—
R
Rev. 1.1
Bit3
—
R
Bit2
—
R
BIASE
R/W
Bit1
SFR Address:
REFBE
R/W
Bit0
0xD1
00000000
Reset Value