C8051F018-GQR Silicon Laboratories Inc, C8051F018-GQR Datasheet - Page 138

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C8051F018-GQR

Manufacturer Part Number
C8051F018-GQR
Description
IC 8051 MCU 16K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Datasheets

Specifications of C8051F018-GQR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F018-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
18.1.
Each module can be configured to operate independently in one of four operation modes: Edge-triggered Capture,
Software Timer, High Speed Output, or Pulse Width Modulator. Each module has Special Function Registers
(SFRs) associated with it in the CIP-51 system controller. These registers are used to exchange data with a module
and configure the module’s mode of operation.
Table 18.1 summarizes the bit settings in the PCA0CPMn registers used to place the PCA capture/compare modules
into different operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module’s CCFn
interrupt. Note: PCA0 interrupts must be globally enabled before individual CCFn interrupts are recognized. PCA0
interrupts are globally enabled by setting the EA bit (IE.7) and the EPCA0 bit (EIE1.3) to logic 1. See Figure 18.2
for details on the PCA interrupt configuration.
X = Don’t Care
ECOM
Timer Overflow
X
X
X
PCA Counter/
1
1
1
PCA Module 0
PCA Module 1
PCA Module 2
PCA Module 3
PCA Module 4
(for n = 0 to 4)
PCA0CPMn
E
C
O
M
n
Capture/Compare Modules
C
A
P
P
n
CAPP
C
A
P
N
n
M
A
T
n
1
0
1
0
0
0
O
G
T
n
Table 18.1. PCA0CPM Register Settings for PCA Capture/Compare Modules
W
M
P
n
C
C
E
F
n
C
F
CAPN
C
R
PCA0CN
0
1
1
0
0
0
C
C
F
4
C
C
F
3
C
C
F
2
C
C
F
1
C
C
F
0
MAT
Figure 18.2. PCA Interrupt Block Diagram
ECCF0
ECCF1
ECCF2
ECCF3
ECCF4
X
0
0
0
1
1
C
D
L
I
PCA0MD
C
P
S
1
TOG
0
1
0
1
0
1
0
1
0
1
C
P
S
0
0
0
0
0
1
0
E
C
F
0
1
Rev. 1.2
PWM
0
0
0
0
0
1
ECCF
X
X
X
X
X
X
Operation Mode
Capture triggered by positive edge on
CEXn
Capture triggered by negative edge on
CEXn
Capture triggered by transition on CEXn
Software Timer
High Speed Output
Pulse Width Modulator
(EIE1.3)
EPCA0
0
1
C8051F018
C8051F019
(IE.7)
EA
0
1
Interrupt
Priority
Decoder
138

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