C8051F018-GQR Silicon Laboratories Inc, C8051F018-GQR Datasheet - Page 52

• Manufacturer Part Number: C8051F018-GQR
• Description: IC 8051 MCU 16K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F018r

Specifications of C8051F018-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F005DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.3.
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers (SFRs). The
SFRs provide control and data exchange with the CIP-51’s resources and peripherals. The CIP-51 duplicates the
SFRs found in a typical 8051 implementation as well as implementing additional SFRs used to configure and access
the sub-systems unique to the MCU. This allows the addition of new functionality while retaining compatibility
with the MCS-51™ instruction set. Table 8.3 lists the SFRs implemented in the CIP-51 System Controller.
The SFR registers are accessed any time the direct addressing mode is used to access memory locations from 0x80
to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, P1, SCON, IE, etc.) are bit-addressable as well
as byte-addressable. All other SFRs are byte-addressable only. Unoccupied addresses in the SFR space are
reserved for future use. Accessing these areas will have an indeterminate effect and should be avoided. Refer to the
corresponding pages of the datasheet, as indicated in Table 8.3, for a detailed description of each register.
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Address
D8
D0
A8
A0
F8
F0
E8
E0
C8
C0
B8
B0
98
90
88
80
0xBC
0xBE
0xC5
0xC4
0xBF
0xC7
0xC6
0xE0
0xE8
Bit Addressable
SPI0CN
B
ADC0CN
ACC
PCA0CN
PSW
T2CON
SMB0CN
IP
P3
IE
P2
SCON
P1
TCON
P0
SPECIAL FUNCTION REGISTERS
0(8)
Register
ACC
ADC0CF
ADC0CN
ADC0GTH
ADC0GTL
ADC0H
ADC0L
ADC0LTH
ADC0LTL
PCA0H
PCA0L
XBR0
PCA0MD
REF0CN
SMB0STA
OSCXCN
SBUF
TMR3CN
TMOD
SP
1(9)
Table 8.2. Special Function Register Memory Map
Description
Accumulator
ADC Configuration
ADC Control
ADC Greater-Than Data Word (High Byte)
ADC Greater-Than Data Word (Low Byte)
ADC Data Word (High Byte)
ADC Data Word (Low Byte)
ADC Less-Than Data Word (High Byte)
ADC Less-Than Data Word (Low Byte)
PCA0CPL0
XBR1
PCA0CPM0
SMB0DAT
OSCICN
SPI0CFG
TMR3RLL
TL0
DPL
PCA0CPH0
RCAP2L
AMX0CF
Table 8.3. Special Function Registers
2(A)
PCA0CPH1
PCA0CPL1
XBR2
PCA0CPM1
RCAP2H
SMB0ADR
AMX0SL
SPI0DAT
TMR3RLH
TL1
DPH
Rev. 1.2
3(B)
PCA0CPH2
PCA0CPL2
PCA0CPM2
TL2
ADC0GTL
ADC0CF
PRT0CF
TMR3L
TH0
4(C)
PCA0CPH3
PCA0CPL3
PCA0CPM3
TH2
ADC0GTH
PRT1IF
PRT1CF
SPI0CKR
TMR3H
TH1
5(D)
PCA0CPH4
EIP1
PCA0CPL4
EIE1
PCA0CPM4
ADC0LTL
ADC0L
FLSCL
PRT2CF
CPT0CN
CKCON
C8051F018
C8051F019
6(E)
WDTCN
EIP2
RSTSRC
EIE2
SMB0CR
ADC0LTH
ADC0H
FLACL
EMI0CN
PRT3CF
CPT1CN
PSCTL
PCON
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