HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 193

MPU 3V 16K I-TEMP,PB-FREE 208-QF

HD6417750RF240DV

Manufacturer Part Number
HD6417750RF240DV
Description
MPU 3V 16K I-TEMP,PB-FREE 208-QF
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF240DV

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF240DV
Manufacturer:
HITACHI
Quantity:
7 287
3.7.5
UTLB data array 1 is allocated to addresses H'F700 0000 to H'F77F FFFF in the P4 area. A data
array access requires a 32-bit address field specification (when reading or writing) and a 32-bit
data field specification (when writing). Information for selecting the entry to be accessed is
specified in the address field, and PPN, V, SZ, PR, C, D, SH, and WT to be written to the data
array are specified in the data field.
In the address field, bits [31:23] have the value H'F70 indicating UTLB data array 1, and the entry
is selected by bits [13:8].
In the data field, PPN is indicated by bits [28:10], V by bit [8], SZ by bits [7] and [4], PR by bits
[6:5], C by bit [3], D by bit [2], SH by bit [1], and WT by bit [0].
The following two kinds of operation can be used on UTLB data array 1:
1. UTLB data array 1 read
2. UTLB data array 1 write
Legend:
VPN:
V:
E:
D:
Address field
PPN, V, SZ, PR, C, D, SH, and WT are read into the data field from the UTLB entry
corresponding to the entry set in the address field.
PPN, V, SZ, PR, C, D, SH, and WT specified in the data field are written to the UTLB entry
corresponding to the entry set in the address field.
Data field
Virtual page number
Validity bit
Entry
Dirty bit
UTLB Data Array 1
31
31
1 1 1 1 0 1 1 0
30 29 28
Figure 3.16 Memory-Mapped UTLB Address Array
ASID:
A:
24
:
23
Address space identifier
Association bit
Reserved bits (0 write value, undefined read value)
VPN
Section 3 Memory Management Unit (MMU)
Rev.7.00 Oct. 10, 2008 Page 107 of 1074
14 13
E
10 9 8 7
D
8 7
V
A
REJ09B0366-0700
ASID
2 1 0
0

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