UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 265

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
6.6.7 Condition before changing CPU clock and processing after changing CPU clock
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
KB2,
KC2,
KD2,
KE2,
KF2
KC2,
KD2,
KE2,
KF2
(other
than
KB2)
Condition before changing the CPU clock and processing after changing the CPU clock are shown below.
Remark The 78K0/KB2 is not provided with a subsystem clock.
Internal high-
speed
oscillation
clock
X1 clock
External main
system clock
Internal high-
speed
oscillation
clock
X1 clock
External main
system clock
Internal high-
speed
oscillation
clock
X1 clock
External main
system clock
XT1 clock,
external
subsystem
clock
Before Change
CPU Clock
X1 clock
External main
system clock
Internal high-
speed
oscillation
clock
XT1 clock
External
subsystem
clock
Internal high-
speed
oscillation
clock
X1 clock
External main
system clock
After Change
Stabilization of X1 oscillation
• MSTOP = 0, OSCSEL = 1, EXCLK = 0
• After elapse of oscillation stabilization
Enabling input of external clock from
EXCLK pin
• MSTOP = 0, OSCSEL = 1, EXCLK = 1
Oscillation of internal high-speed oscillator
• RSTOP = 0
Stabilization of XT1 oscillation
• XTSTART = 0, EXCLKS = 0,
• After elapse of oscillation stabilization
Enabling input of external clock from
EXCLKS pin
• XTSTART = 0, EXCLKS = 1,
Oscillation of internal high-speed oscillator
and selection of internal high-speed
oscillation clock as main system clock
• RSTOP = 0, MCS = 0
Stabilization of X1 oscillation and
selection of high-speed system clock as
main system clock
• MSTOP = 0, OSCSEL = 1, EXCLK = 0
• After elapse of oscillation stabilization
• MCS = 1
Enabling input of external clock from
EXCLK pin and selection of high-speed
system clock as main system clock
• MSTOP = 0, OSCSEL = 1, EXCLK = 1
• MCS = 1
OSCSELS = 1
OSCSELS = 1, or XTSTART = 1
time
time
time
Table 6-7. Changing CPU Clock
Condition Before Change
• Internal high-speed oscillator can be
• Clock supply to CPU is stopped for 4.06 to
• Internal high-speed oscillator can be
• Clock supply to CPU is stopped for the
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
Operating current can be reduced by
stopping internal high-speed oscillator
(RSTOP = 1).
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
Operating current can be reduced by
stopping internal high-speed oscillator
(RSTOP = 1).
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
XT1 oscillation can be stopped or external
subsystem clock input can be disabled
(OSCSELS = 0).
• XT1 oscillation can be stopped or
• Clock supply to CPU is stopped for 4.06 to
• XT1 oscillation can be stopped or
• Clock supply to CPU is stopped for the
CHAPTER 6 CLOCK GENERATOR
stopped (RSTOP = 1).
16.12
stopped (RSTOP = 1).
duration of 160 external clocks from the
EXCLK pin after AMPH has been set to 1.
external subsystem clock input can be
disabled (OSCSELS = 0).
16.12
external subsystem clock input can be
disabled (OSCSELS = 0).
duration of 160 external clocks from the
EXCLK pin after AMPH has been set to 1.
μ s after AMPH has been set to 1.
μ s after AMPH has been set to 1.
Processing After Change
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