UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 966

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Interrupt
function
Function
1F0L, 1F0L,
1F1L, 1F1H:
Interrupt request
flag registers
MK0L, MK0H,
MK1L, MK1H:
Interrupt mask
flag registers
PR0L, PR0H,
PR1L, PR1H:
Priority
specification flag
registers
Details of
Function
When operating a timer, serial interface, or A/D converter after standby release,
operate it once after clearing the interrupt request flag. An interrupt request flag may
be set by noise.
When manipulating a flag of the interrupt request flag register, use a 1-bit memory
manipulation instruction (CLR1). When describing in C language, use a bit
manipulation instruction such as “IF0L.0 = 0;” or “_asm(“clr1 IF0L, 0”);” because the
compiled assembler must be a 1-bit memory manipulation instruction (CLR1).
If a program is described in C language using an 8-bit memory manipulation instruction
such as “IF0L &= 0xfe;” and compiled, it becomes the assembler of three instructions.
In this case, even if the request flag of another bit of the same interrupt request flag
register (IF0L) is set to 1 at the timing between “mov a, IF0L” and “mov IF0L, a”, the
flag is cleared to 0 at “mov IF0L, a”. Therefore, care must be exercised when using an
8-bit memory manipulation instruction in C language.
Be sure to clear bits 2, 4 to 7 of IF1L and bits 1 to 7 of IF1H to 0. (78K0/KB2)
Be sure to clear bits 6 and 7 of IF1L to 0 in the 38-pin and 44-pin products.
Be sure to clear bit 7 of IF1L to 0 in the 48-pin products.
Be sure to clear bits 1 to 7 of IF1H to 0. (78K0/KC2)
Be sure to clear bit 7 of 1F1L and bits 1 to 7 of IF1H to 0. (78K0/KD2)
Be sure to clear bits 1 to 7 of IF1H to 0 for the products whose flash memory is less
than 32 KB.
Be sure to clear bits 4 to 7 of IF1H to 0 for the products whose flash memory is at least
48 KB. (78K0/KE2)
Be sure to clear bits 5 to 7 of IF1H to 0. (78K0/KF2)
Be sure to set bits 2, 4 to 7 of MK1L and bits 1 to 7 of MK1H to 1. (78K0/KB2)
Be sure to set bits 6 and 7 of MK1L to 1 in the 38-pin and 44-pin products.
Be sure to set bit 7 of MK1L to 1 in the 48-pin products.
Be sure to set bits 1 to 7 of MK1H to 1. (78K0/KC2)
Be sure to set bit 7 of MK1L and bits 1 to 7 of MK1H to 1. (78K0/KD2)
Be sure to set bits 1 to 7 of MK1H to 1 for the products whose flash memory is less
than 32 KB.
Be sure to set bits 4 to 7 of MK1H to 1 for the products whose flash memory is at least
48 KB. (78K0/KE2)
Be sure to set bits 5 to 7 of MK1H to 1. (78K0/KF2)
Be sure to set bits 2, 4 to 7 of PR1L and bits 1 to 7 of PR1H to 1. (78K0/KB2)
Be sure to set bits 6 and 7 of PR1L to 1 in the 38-pin and 44-pin products.
Be sure to set bit 7 of PR1L to 1 in the 48-pin products.
Be sure to set bits 1 to 7 of PR1H to 1. (78K0/KC2)
Be sure to set bit 7 of PR1L and bits 1 to 7 of PR1H to 1. (78K0/KD2)
Be sure to set bits 1 to 7 of PR1H to 1 for the products whose flash memory is less
than 32 KB.
Be sure to set bits 4 to 7 of PR1H to 1 for the products whose flash memory is at least
48 KB. (78K0/KE2)
Be sure to set bits 5 to 7 of PR1H to 1. (78K0/KF2)
mov a, IF0L
and a, #0FEH
mov IF0L, a
Cautions
APPENDIX D LIST OF CAUTIONS
p. 643
p. 637
p. 637
p. 638
p. 639
p. 639
p. 640
p. 641
p. 642
p. 644
p. 645
p. 646
p. 647
p. 648
p. 649
p. 650
p. 651
p. 652
(23/30)
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