UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 369

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Notes 2.
Cautions 1. When TMHE0 = 1, setting the other bits of TMHMD0 is prohibited. However, TMHMD0 can be
Remarks 1. f
3.
4.
2. TMC506: Bit 6 of 8-bit timer mode control register 50 (TMC50)
2. In the PWM output mode, be sure to set the 8-bit timer H compare register 10 (CMP10) when
3. The actual TOH0/P15 pin output is determined depending on PM15 and P15, besides TOH0
If the peripheral hardware clock (f
when 1.8 V ≤ V
This is settable only if 4.0 V ≤ V
Note the following points when selecting the TM50 output as the count clock.
It is not necessary to enable (TOE50 = 1) TO50 output in any mode.
• Mode in which the count clock is cleared and started upon a match of TM50 and CR50 (TMC506 = 0)
• PWM mode (TMC506 = 1)
TMC501: Bit 1 of TMC50
PRS
refreshed (the same value is written).
starting the timer count operation (TMHE0 = 1) after the timer count operation was stopped
(TMHE0 = 0) (be sure to set again even if setting the same value to CMP10).
output.
Start the operation of 8-bit timer/event counter 50 first and then enable the timer F/F inversion operation
(TMC501 = 1).
Start the operation of 8-bit timer/event counter 50 first and then set the count clock to make the duty =
50%.
: Peripheral hardware clock frequency
DD
< 2.7 V, the setting of CKS02 = CKS01 = CKS00 = 0 (count clock: f
DD
PRS
≤ 5.5 V.
) operates on the internal high-speed oscillation clock (f
CHAPTER 9 8-BIT TIMERS H0 AND H1
PRS
) is prohibited.
RH
) (XSEL = 0),
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