UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 349

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Notes 1.
Cautions 1. When rewriting TCL50 to other data, stop the timer operation beforehand.
Remark f
Address: FF6AH
Symbol
TCL50
2.
3.
4.
2. Be sure to clear bits 3 to 7 to “0”.
PRS
The frequency that can be used for the peripheral hardware clock (f
supply voltage and product specifications.
Do not start timer operation with the external clock from the TI50 pin when the internal high-speed
oscillation clock and high-speed system clock are stopped while the CPU operates with the subsystem
clock, or when in the STOP mode.
If the peripheral hardware clock (f
when 1.8 V ≤ V
This is settable only if 4.0 V ≤ V
(The values shown in the table above are those when f
: Peripheral hardware clock frequency
4.0 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
(Standard products and
(A) grade products only)
TCL502
7
0
0
0
0
0
1
1
1
1
Supply Voltage
After reset: 00H
DD
DD
DD
Figure 8-5. Format of Timer Clock Selection Register 50 (TCL50)
≤ 5.5 V
< 4.0 V
< 2.7 V
DD
TCL501
< 2.7 V, the setting of TCL502, TCL501, TCL500 = 0, 1, 0 (count clock: f
6
0
0
0
1
1
0
0
1
1
R/W
TCL500
f
f
f
Conventional-specification Products
PRS
PRS
PRS
5
0
0
1
0
1
0
1
0
1
DD
(
μ
≤ 20 MHz
≤ 10 MHz
≤ 5 MHz
PRS
≤ 5.5 V.
PD78F05xx and 78F05xxD)
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50 AND 51
) operates on the internal high-speed oscillation clock (f
TI50 pin falling edge
TI50 pin rising edge
f
f
f
f
f
f
PRS
PRS
PRS
PRS
PRS
PRS
Note 3
/2
/2
/2
/2
/2
4
0
2
6
8
13
2 MHz
1 MHz
500 kHz
31.25 kHz
7.81 kHz
0.24 kHz
2 MHz
f
PRS
3
0
PRS
Note 2
Count clock selection
Note 2
=
= f
XH
2.5 MHz
78.13 kHz
0.61 kHz
5 MHz
1.25 MHz
19.53 kHz
TCL502
5 MHz
f
(XSEL = 1).)
PRS
2
f
f
PRS
PRS
=
Expanded-specification Products
(
μ
PRS
PD78F05xxA and 78F05xxDA)
≤ 20 MHz
≤ 5 MHz
) differs depending on the power
10 MHz
5 MHz
2.5 MHz
156.25 kHz 312.5 kHz
39.06 kHz
1.22 kHz
Note 1
TCL501
10 MHz
f
PRS
1
=
20 MHz
10 MHz
5 MHz
78.13 kHz
2.44 kHz
TCL500
20 MHz
f
PRS
PRS
0
RH
=
Note 4
) is prohibited.
) (XSEL = 0),
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