UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 311

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Note Care must be exercised when setting TOC0n. For details, see 7.3 (3) 16-bit timer output control register 0n
Remark n = 0:
Compare match interrupt
Compare match interrupt
Figure 7-36. Example of Software Processing in Clear & Start Mode Entered by TI00n Pin Valid Edge Input
<1> Count operation start flow
<2> TM0n register clear & start flow
(TMC0n3, TMC0n2)
(TOC0n).
Compare register
Compare register
Count clear input
(TI00n pin input)
TMC0n3, TMC0n2 bits = 10
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
TM0n register
CR00n, CR01n registers,
Operable bits
Edge input to TI00n pin
TO0n output
(INTTM00n)
(INTTM01n)
Register initial setting
TMC0n.TMC0n1 bit,
TOC0n register
PRM0n register,
CRC0n register,
(CR00n)
(CR01n)
port setting
0000H
START
78K0/KD2 products
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
Note
00
,
<1>
Initial setting of these
registers is performed
before setting the
TMC0n3 and TMC0n2
bits to 10.
Starts count operation
When the valid edge is input to the TI00n pin,
the value of the TM0n register is cleared.
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
N
M
<2>
<3> Count operation stop flow
10
M
N
N
TMC0n3, TMC0n2 bits = 00
M
<2>
STOP
<2>
N
M
<2>
The counter is initialized
and counting is stopped
by clearing the TMC0n3
and TMC0n2 bits to 00.
N
M
<3>
00
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