UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 321

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UPD78F0513AGA-GAM-AX

Manufacturer Part Number
UPD78F0513AGA-GAM-AX
Description
MCU 8BIT 48-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0513AGA-GAM-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0513AGA-GAM-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD78F0513AGA-GAM-AX
Manufacturer:
NEC
Quantity:
20 000
78K0/Kx2
7.4.6 PPG output operation
Pulse Generator) signal during a cycle set by CR00n when bits 3 and 2 (TMC0n3 and TMC0n2) of 16-bit timer mode
control register 0n (TMC0n) are set to 11 (clear & start upon a match between TM0n and CR00n).
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
A square wave having a pulse width set in advance by CR01n is output from the TO0n pin as a PPG (Programmable
The pulse cycle and duty factor of the pulse generated as the PPG output are as follows.
• Pulse cycle = (Set value of CR00n + 1) × Count clock cycle
• Duty = (Set value of CR01n + 1) / (Set value of CR00n + 1)
Caution To change the duty factor (value of CR01n) during operation, see 7.5.1 Rewriting CR01n during TM0n
Remarks 1. For the setting of I/O pins, see 7.3 (5) Port mode register 0 (PM0).
Remark n = 0:
Count clock
operation.
2. For how to enable the INTTM00n signal interrupt, see CHAPTER 20 INTERRUPT FUNCTIONS.
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
TMC0n3, TMC0n2
Operable bits
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
Figure 7-45. Block Diagram of PPG Output Operation
Compare register
Timer counter
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Match signal
(CR01n)
(TM0n)
Compare register
Clear
(CR00n)
Match signal
controller
Output
TO0n output
Interrupt signal
(INTTM00n)
Interrupt signal
(INTTM01n)
TO0n pin
321

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