UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 666

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
22.1 Standby Function and Configuration
22.1.1 Standby function
available.
(1) HALT mode
(2) STOP mode
are held. The I/O port output latches and output buffer statuses are also held.
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The standby function is mounted onto all 78K0/Kx2 microcontroller products.
The standby function is designed to reduce the operating current of the system.
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode is set
Cautions 1. The STOP mode can be used only when the CPU is operating on the main system clock. The
HALT instruction execution sets the HALT mode. In the HALT mode, the CPU operation clock is stopped. If the high-
speed system clock oscillator, internal high-speed oscillator, internal low-speed oscillator, or subsystem clock
oscillator is operating before the HALT mode is set, oscillation of each clock continues. In this mode, the operating
current is not decreased as much as in the STOP mode, but the HALT mode is effective for restarting operation
immediately upon interrupt request generation and carrying out intermittent operations frequently.
Note
STOP instruction execution sets the STOP mode. In the STOP mode, the high-speed system clock oscillator and
internal high-speed oscillator stop, stopping the whole system, thereby considerably reducing the CPU operating
current.
Because this mode can be cleared by an interrupt request, it enables intermittent operations to be carried out.
However, because a wait time is required to secure the oscillation stabilization time after the STOP mode is released
when the X1 clock is selected, select the HALT mode if it is necessary to start processing immediately upon interrupt
request generation.
The 78K0/KB2 is not provided with a subsystem clock oscillator.
2. When shifting to the STOP mode, be sure to stop the peripheral hardware operation operating
3. The following sequence is recommended for operating current reduction of the A/D converter
subsystem clock oscillation cannot be stopped. The HALT mode can be used when the CPU is
operating on either the main system clock or the subsystem clock.
with main system clock before executing STOP instruction.
when the standby function is used: First clear bit 7 (ADCS) and bit 0 (ADCE) of the A/D converter
mode register (ADM) to 0 to stop the A/D conversion operation, and then execute the STOP
instruction.
CHAPTER 22 STANDBY FUNCTION
CHAPTER 22 STANDBY FUNCTION
The following two modes are
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