MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 20

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Figure
A-2
A-3
A-4
A-5
A-6
A-7
A-8
A-9
A-10
A-11
A-12
A-13
A-14
A-15
A-16
A-17
A-18
A-19
A-20
A-21
A-22
A-23
A-24
A-25
A-26
A-27
A-28
A-29
A-30
A-31
A-32
A-33
A-34
A-35
A-36
A-37
B-1
B-2
B-3
D-1
xx
MOTOROLA
External Clock Input Timing Diagram ........................................................... A-11
ECLK Output Timing Diagram ...................................................................... A-11
Read Cycle Timing Diagram ........................................................................ A-12
Write Cycle Timing Diagram ......................................................................... A-13
Fast Termination Read Cycle Timing Diagram ............................................ A-14
Fast Termination Write Cycle Timing Diagram ............................................. A-15
Bus Arbitration Timing Diagram — Active Bus Case ................................... A-16
Bus Arbitration Timing Diagram — Idle Bus Case ....................................... A-17
Show Cycle Timing Diagram ........................................................................ A-18
Chip-Select Timing Diagram ........................................................................ A-19
Reset and Mode Select Timing Diagram ...................................................... A-19
Background Debug Mode Timing Diagram (Serial Communication) ............ A-20
Background Debug Mode Timing Diagram (Freeze Assertion) .................... A-21
ECLK Timing Diagram .................................................................................. A-22
QSPI Timing — Master, CPHA = 0 .............................................................. A-24
QSPI Timing — Master, CPHA = 1 .............................................................. A-24
QSPI Timing — Slave, CPHA = 0 ................................................................ A-25
QSPI Timing — Slave, CPHA = 1 ................................................................ A-25
SPI Timing — Master, CPHA = 0 ................................................................. A-27
SPI Timing — Master, CPHA = 1 ................................................................. A-27
SPI Timing — Slave, CPHA = 0 ................................................................... A-28
SPI Timing — Slave, CPHA = 1 ................................................................... A-28
Input Signal Conditioner Timing ................................................................... A-29
Pulse Accumulator — Event Counting Mode (Leading Edge) ...................... A-30
Pulse Accumulator — Gated Mode (Count While Pin High) ........................ A-31
Pulse Accumulator — Using TOF as Gated Mode Clock ............................. A-32
PWMx (PWMx Register = 01, Fast Mode) ................................................... A-32
Output Compare (Toggle Pin State) ............................................................. A-33
Input Capture (Capture on Rising Edge) ...................................................... A-34
General-Purpose Input ................................................................................. A-35
General-Purpose Output (Causes Input Capture) ........................................ A-36
Force Compare (CLEAR) ............................................................................. A-37
8-Bit ADC Conversion Accuracy .................................................................. A-41
10-Bit ADC Conversion Accuracy ................................................................ A-42
Programming Voltage Envelope ................................................................... A-44
V
MC68HC16Y3 Pin Assignment for 160-Pin Package ..................................... B-2
MC68HC916Y3 Pin Assignment for 160-Pin Package ................................... B-3
160-Pin Package Dimensions ........................................................................ B-4
CPU16 Register Model ...................................................................................D-2
FPE
Conditioning Circuit ............................................................................. A-44
LIST OF ILLUSTRATIONS
(Continued)
Title
MC68HC16Y3/916Y3
USER’S MANUAL
Page