MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 411

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
STOP — Stop Mode Control
FRZ — Freeze Mode Control
BOOT — Boot Control
LOCK — Lock Registers
ASPC[1:0] — Flash EEPROM Array Space
MC68HC16Y3/916Y3
USER’S MANUAL
STOP can be set either by pulling data bus pin DATA14 low during reset (for all flash
EEPROM modules) or by the corresponding shadow bit. The array can be re-enabled
by clearing STOP. If STOP is set during programming or erasing, the program/erase
voltage is automatically turned off. However, the ENPE control bit in FEExCTL re-
mains set. When STOP is cleared, the program/erase voltage is automatically turned
back on if ENPE is set.
On reset, BOOT takes on the value stored in its associated shadow bit. If BOOT = 0
and STOP = 0, the module responds to program space accesses to IMB addresses
$000000 to $000006 following reset, and the contents of FEExBS[3:0] are used as
bootstrap vectors. After address $000006 is read, the module responds normally to
control block or array addresses only.
If the reset state of LOCK is zero, it can be set once after reset to allow protection of
the registers after initialization. Once the LOCK bit is set by software, it cannot be
cleared again until after a reset.
ASPC[1:0] assigns the array to supervisor or user space, and to program or data
space. The state of ASPC[1:0] out of reset is determined by the value stored in the as-
sociated shadow bits. Since the CPU16 runs only in supervisor mode, ASPC1 must
remain set to one for array accesses to take place. The field can be written only when
LOCK = 0 and STOP = 1. Refer to Table D-24.
0 = Normal operation.
1 = Low-power stop operation.
0 = Disable program/erase voltage while FREEZE is asserted.
1 = Allow the ENPE bit to turn on the program/erase voltage while FREEZE is
0 = Flash EEPROM module responds to bootstrap addresses after reset.
1 = Flash EEPROM module does not respond to bootstrap addresses after reset.
0 = Write-locking disabled.
1 = Write-locked registers protected.
asserted.
ASPC[1:0]
10
11
Table D-24 Array Space Encoding
Supervisor program and data space
Supervisor program space
Type of Access
MOTOROLA
D-33

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