AT91SAM7S256C-MU Atmel, AT91SAM7S256C-MU Datasheet - Page 544

• Manufacturer Part Number: AT91SAM7S256C-MU
• Description: IC ARM7 MCU 32BIT 256K 64-QFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S256C-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT91
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: SPI, TWI, USART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 5
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S256-MU; AT91SAM7S256-MU

36.6.2
Register Name:
Access Type:
• TRGEN: Trigger Enable
• TRGSEL: Trigger Selection
• LOWRES: Resolution
• SLEEP: Sleep Mode
544
LOWRES
TRGEN
SLEEP
31
23
15
0
1
0
1
0
1
0
0
0
0
1
1
1
1
–
–
7
–
AT91SAM7S Series Preliminary
ADC Mode Register
Selected TRGEN
Hardware triggers are disabled. Starting a conversion is only possible by software.
Hardware trigger selected by TRGSEL field is enabled.
Selected Mode
Normal Mode
Sleep Mode
Selected Resolution
10-bit resolution
8-bit resolution
TRGSEL
30
22
14
0
0
1
1
0
0
1
1
ADC_MR
Read/Write
–
6
–
SLEEP
29
21
13
0
1
0
1
0
1
0
1
–
5
Selected TRGSEL
TIOA Ouput of the Timer Counter Channel 0
TIOA Ouput of the Timer Counter Channel 1
TIOA Ouput of the Timer Counter Channel 2
Reserved
Reserved
Reserved
External trigger
Reserved
LOWRES
28
20
12
–
4
PRESCAL
STARTUP
27
19
11
3
TRGSEL
26
18
10
2
SHTIM
25
17
9
1
6175K–ATARM–30-Aug-10
TRGEN
24
16
8
0