AT91SAM7S256C-MU Atmel, AT91SAM7S256C-MU Datasheet - Page 768

• Manufacturer Part Number: AT91SAM7S256C-MU
• Description: IC ARM7 MCU 32BIT 256K 64-QFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S256C-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT91
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: SPI, TWI, USART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 5
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S256-MU; AT91SAM7S256-MU

758
Version
6175C
AT91SAM7S Series Preliminary
Comments
AT91SAM7S321 addresses
Values given in PIO Line column:
Section 40. ”Errata”
Section 40.6.3.1 ”MCK: Limited Master Clock Frequency Ranges”
Section 40.10.3.1 ”MCK: Limited Master Clock Frequency Ranges”
Section 40.14.3.1 ”MCK: Limited Master Clock Frequency Ranges”
Section 40.19.3.1 ”MCK: Limited Master Clock Frequency Ranges”
and
Section 40.6.4.1 ”NVM Bits: Write/Erase Cycles Number”
Section 40.10.4.1 ”NVM Bits: Write/Erase Cycles Number”
Section 40.14.4.1 ”NVM Bits: Write/Erase Cycles Number”
Section 40.19.4.1 ”NVM Bits: Write/Erase Cycles Number”
note
”Voltage Regulator Mode Register” page
AT91SAM7S321 addresses
Values given in PIO Line column:
(2)
added to
Table 37-24, “Embedded Flash Wait States,” on page 578
added lines and note to the following:
redefined:Table 22-4, “User Area Addresses,” on page 171
redefined:Table 22-4, “User Area Addresses,” on page 171
Table 22-5, “Pins Driven during Boot Program Execution,” on page 171
Table 22-5, “Pins Driven during Boot Program Execution,” on page 171
118, bit field name corrected
AT91SAM7S256
AT91SAM7S128
AT91SAM7S64
AT91SAM7S32
AT91SAM7S256
AT91SAM7S128
AT91SAM7S64
AT91SAM7S32
”PSTDBY: Power Standby Mode”
6175K–ATARM–30-Aug-10
Change
Request
Ref
#1217
#1547 and
review
review
#1585
#1217