AT91SAM7S256C-MU Atmel, AT91SAM7S256C-MU Datasheet - Page 597

• Manufacturer Part Number: AT91SAM7S256C-MU
• Description: IC ARM7 MCU 32BIT 256K 64-QFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S256C-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT91
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: SPI, TWI, USART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 5
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S256-MU; AT91SAM7S256-MU

40.4.2
40.4.2.1
40.4.3
40.4.3.1
40.4.3.2
6175K–ATARM–30-Aug-10
Embedded Flash Controller (EFC)
Parallel Input/Output Controller (PIO)
EFC: Embedded Flash Access Time 1
PIO: Leakage on PA17 - PA20
PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
To activate sleep mode as soon as possible, it is recommended to write successively, ADC
Mode Register (SLEEP) then ADC Control Register (START bit field); to start an analog-to-digi-
tal conversion, in order put ADC into sleep mode at the end of this conversion.
The embedded Flash maximum access time is 20 MHz (instead of 30 MHz) at zero Wait State
(FWS = 0).
The maximum operating frequency with one Wait State (FWS = 1) is 48.1 MHz (instead of 55
MHz). Above 48.1 MHz and until 55 MHz, two Wait States (FWS = 2) are required.
Set the number of Wait States (FWS) according to the frequency requirements described in this
errata.
When PA17, PA18, PA19 or PA20 (the I/O lines multiplexed with the analog inputs) are set as
digital inputs with pull-up disabled, the leakage can be 9 µA in worst case and 90 nA in typical
case per I/O when the I/O is set externally at low level.
Set the I/O to VDDIO by internal or external pull-up.
When NRST or PA0-PA16 or PA21-PA31 are set as digital inputs with pull-up enabled, the volt-
age of the I/O stabilizes at VPull-up.
Vpull-up
This condition causes a leakage through VDDIO. This leakage is 45 µA per pad in worst case at
3.3 V and 25 µA at 1.8V.
I Leakage
It is recommended to use an external pull-up if needed.
VPull-up Min
VDDIO - 0.65 V
Parameter
I Leakage at 3,3V
I Leakage at 1.8V
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
VPull-up Max
VDDIO - 0.45 V
Typ
2.5
1
µA
µA
Max
45
25
AT91SAM7S Series Preliminary
µA
µA
597