S9S08DZ60F1MLH Freescale Semiconductor, S9S08DZ60F1MLH Datasheet - Page 108

• Manufacturer Part Number: S9S08DZ60F1MLH
• Description: MCU 60K FLASH MASK AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08DZ60F1MLH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Processor Series: S08D
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 6 Parallel Input/Output Control
6.5.6
Port F is controlled by the registers listed below.
6.5.6.1
6.5.6.2
108
PTFDD[7:0]
PTFD[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTFDD7
PTFD7
Port F Registers
Port F Data Register Bits — For port F pins that are inputs, reads return the logic level on the pin. For port F
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port F pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTFD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups disabled.
Data Direction for Port F Bits — These read/write bits control the direction of port F pins and what is read for
PTFD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port F bit n and PTFD reads return the contents of PTFDn.
Port F Data Register (PTFD)
0
Port F Data Direction Register (PTFDD)
0
7
7
PTFDD6
PTFD6
0
0
6
6
Figure 6-38. Port F Data Direction Register (PTFDD)
Table 6-36. PTFDD Register Field Descriptions
Table 6-35. PTFD Register Field Descriptions
Figure 6-37. Port F Data Register (PTFD)
PTFDD5
MC9S08DZ60 Series Data Sheet, Rev. 4
PTFD5
0
0
5
5
PTFDD4
PTFD4
0
0
4
4
Description
Description
PTFDD3
PTFD3
3
0
3
0
PTFDD2
PTFD2
0
0
2
2
PTFDD1
Freescale Semiconductor
PTFD1
0
0
1
1
PTFDD0
PTFD0
0
0
0
0