S9S08DZ60F1MLH Freescale Semiconductor, S9S08DZ60F1MLH Datasheet - Page 355

• Manufacturer Part Number: S9S08DZ60F1MLH
• Description: MCU 60K FLASH MASK AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08DZ60F1MLH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Processor Series: S08D
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
Freescale Semiconductor
SYNC
ACK_ENABLE
ACK_DISABLE
BACKGROUND
READ_STATUS
WRITE_CONTROL
READ_BYTE
READ_BYTE_WS
READ_LAST
WRITE_BYTE
WRITE_BYTE_WS
READ_BKPT
WRITE_BKPT
GO
TRACE1
TAGGO
READ_A
READ_CCR
READ_PC
READ_HX
READ_SP
READ_NEXT
READ_NEXT_WS
WRITE_A
WRITE_CCR
WRITE_PC
WRITE_HX
WRITE_SP
WRITE_NEXT
WRITE_NEXT_WS
The SYNC command is a special operation that does not have a command code.
Mnemonic
Command
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Non-intrusive
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Active BDM
Non-intrusive
Active BDM/
Table 17-1. BDC Command Summary
MC9S08DZ60 Series Data Sheet, Rev. 4
n/a
D5/d
D6/d
90/d
E4/SS
C4/CC
E0/AAAA/d/RD
E1/AAAA/d/SS/RD
E8/SS/RD
C0/AAAA/WD/d
C1/AAAA/WD/d/SS
E2/RBKP
C2/WBKP
08/d
10/d
18/d
68/d/RD
69/d/RD
6B/d/RD16
6C/d/RD16
6F/d/RD16
70/d/RD
71/d/SS/RD
48/WD/d
49/WD/d
4B/WD16/d
4C/WD16/d
4F/WD16/d
50/WD/d
51/WD/d/SS
1
Structure
Coding
Request a timed reference pulse to determine
target BDC communication speed
Enable acknowledge protocol. Refer to
Freescale document order no. HCS08RMv1/D.
Disable acknowledge protocol. Refer to
Freescale document order no. HCS08RMv1/D.
Enter active background mode if enabled
(ignore if ENBDM bit equals 0)
Read BDC status from BDCSCR
Write BDC controls in BDCSCR
Read a byte from target memory
Read a byte and report status
Re-read byte from address just read and
report status
Write a byte to target memory
Write a byte and report status
Read BDCBKPT breakpoint register
Write BDCBKPT breakpoint register
Go to execute the user application program
starting at the address currently in the PC
Trace 1 user instruction at the address in the
PC, then return to active background mode
Same as GO but enable external tagging
(HCS08 devices have no external tagging pin)
Read accumulator (A)
Read condition code register (CCR)
Read program counter (PC)
Read H and X register pair (H:X)
Read stack pointer (SP)
Increment H:X by one then read memory byte
located at H:X
Increment H:X by one then read memory byte
located at H:X. Report status and data.
Write accumulator (A)
Write condition code register (CCR)
Write program counter (PC)
Write H and X register pair (H:X)
Write stack pointer (SP)
Increment H:X by one, then write memory byte
located at H:X
Increment H:X by one, then write memory byte
located at H:X. Also report status.
Chapter 17 Development Support
Description
355