S9S08DZ60F1MLH Freescale Semiconductor, S9S08DZ60F1MLH Datasheet - Page 345

no-image

S9S08DZ60F1MLH

Manufacturer Part Number
S9S08DZ60F1MLH
Description
MCU 60K FLASH MASK AUTO 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08DZ60F1MLH

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LQFP
Processor Series
S08D
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S08DZ60F1MLH
Manufacturer:
FREESCALE
Quantity:
8 200
Part Number:
S9S08DZ60F1MLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S9S08DZ60F1MLH
Manufacturer:
FREESCALE
Quantity:
8 200
Freescale Semiconductor
TPMxCNTH:TPMxCNTL
TPMxCNTH:TPMxCNTL
TPMxMODH:TPMxMODL = 0x0007
TPMxCnVH:TPMxCnVL = 0x0005
TPMxMODH:TPMxMODL = 0x0007
TPMxCnVH:TPMxCnVL = 0x0005
EPWM mode
EPWM mode
(in TPMv2 and TPMv3)
(in TPMv2 and TPMv3)
TPMv2 TPMxCHn
TPMv2 TPMxCHn
CLKSB:CLKSA BITS
CLKSB:CLKSA BITS
TPMv3 TPMxCHn
TPMv3 TPMxCHn
ELSnB:ELSnA BITS
ELSnB:ELSnA BITS
RESET (active low)
RESET (active low)
MSnB:MSnA BITS
MSnB:MSnA BITS
The following procedure can be used in TPM v3 (when the channel pin is also a port pin) to emulate
the high-true EPWM generated by TPM v2 after the reset.
BUS CLOCK
BUS CLOCK
Figure 0-1. Generation of high-true EPWM signal by TPM v2 and v3 after the reset
Figure 0-2. Generation of low-true EPWM signal by TPM v2 and v3 after the reset
CHnF BIT
CHnF BIT
00
00
00
00
MC9S08DZ60 Series Data Sheet, Rev. 4
00
00
0
0
10
10
10
01
Chapter 16 Timer/PWM Module (S08TPMV3)
1 2 3 4 5 6 7
1 2 3 4 5 6 7
01
01
0 1
0 1
2
2
...
...
345

Related parts for S9S08DZ60F1MLH