S9S08DZ60F1MLH Freescale Semiconductor, S9S08DZ60F1MLH Datasheet - Page 331

• Manufacturer Part Number: S9S08DZ60F1MLH
• Description: MCU 60K FLASH MASK AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08DZ60F1MLH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Processor Series: S08D
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

When BDM is active, the coherency mechanism is frozen (unless reset by writing to TPMxSC register)
such that the buffer latches remain in the state they were in when the BDM became active, even if one or
both halves of the modulo register are written while BDM is active. Any write to the modulo registers
bypasses the buffer latches and directly writes to the modulo register while BDM is active.
Reset the TPM counter before writing to the TPM modulo registers to avoid confusion about when the first
counter overflow will occur.
16.3.4
TPMxCnSC contains the channel-interrupt-status flag and control bits used to configure the interrupt
enable, channel configuration, and pin function.
Freescale Semiconductor
Reset
Reset
Reset
W
W
W
R
R
R
CHnF
Bit 15
Bit 7
TPM Channel n Status and Control Register (TPMxCnSC)
0
0
0
0
7
7
7
Figure 16-12. TPM Channel n Status and Control Register (TPMxCnSC)
= Unimplemented or Reserved
Figure 16-10. TPM Counter Modulo Register High (TPMxMODH)
Figure 16-11. TPM Counter Modulo Register Low (TPMxMODL)
CHnIE
14
0
6
0
0
6
6
6
MSnB
MC9S08DZ60 Series Data Sheet, Rev. 4
13
5
0
5
5
0
5
0
MSnA
12
0
4
0
0
4
4
4
ELSnB
11
0
3
0
0
3
3
3
Chapter 16 Timer/PWM Module (S08TPMV3)
ELSnA
10
0
2
0
0
2
2
2
1
9
0
1
1
0
1
0
0
Bit 8
Bit 0
0
0
0
0
0
0
0
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