MC13224V Freescale Semiconductor, MC13224V Datasheet - Page 21

• Manufacturer Part Number: MC13224V
• Description: ZIGBEE PLATFORM 802.15.4 145-LGA
• Manufacturer: Freescale Semiconductor

Specifications of MC13224V

• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 4dBm
• Sensitivity: -100dBm
• Voltage - Supply: 2 V ~ 3.6 V
• Current - Receiving: 24mA
• Current - Transmitting: 29mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 96kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 145-LGA
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2.4 GHz
• Interface Type: 4-Wire SPI, I2C
• Output Power: 1.5 dBm
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 31 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• No. Of Pins: 99
• Supply Voltage Range: 2V To 3.6V
• Operating Temperature Range: -40°C To +125°C
• Msl: MSL 3 - 168 Hours
• A/d Converter: 12 Bits
• No. Of Timers 8/12/16/32 Bits: 0 / 0 / 4 / 0
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.3
The MC1322x provides a timer module (TMR) that contains four identical counter/timer groups. Each
group is capable of many variants of input capture, output compare and pulse-width modulation. The wide
range of operational modes is useful for many control and sensor applications.
Figure 7
Each 16-bit counter/timer group contains a prescaler, a counter, a load register, a hold register, a capture
register, two compare registers, and status and control registers.
Freescale Semiconductor
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Load Register — Provides the initialization value to the counter when the counter’s terminal value
has been reached
Hold Register — Captures the counter’s value when other counters are being read. This feature
supports the reading of cascaded counters
Capture Register — Enables an external signal to take a snap shot of the counter’s current value
COMP1 and COMP2 Registers — Provides the values to which the counter is compared. If a match
occurs, the OFLAG signal can be set, cleared, or toggled. At match time, an interrupt is generated
(if enabled), and the new compare value is loaded into the COMP1 or COMP2 registers from
CMPLD1 and CMPLD2 if enabled
The Prescaler provides different time bases useful for clocking the counter/timer
shows a block diagram of an individual timer group.
Timer (TMR) Module
DATA
MCU
Peripheral
Reference
BUS
Clock
Reference
Counter
Other
STATUS AND
CONTROL
CMPLD1
CMPLD2
LOAD
Prescaler
Figure 7. Timer Group Block Diagram
External
MC1322x Technical Data, Rev. 1.3
COUNTER
COMP1
COMP2
M
U
X
CAPTURE
Comparator
Comparator
HOLD
M
U
X
OFLAG
Output
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