KSZ8863FLLI Micrel Inc, KSZ8863FLLI Datasheet - Page 10

• Manufacturer Part Number: KSZ8863FLLI
• Description: IC ETHERNET SWITCH 3PORT 48-LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8863FLLI

• Controller Type: Ethernet Switch Controller
• Interface: MII
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3750

Micrel, Inc.
KSZ8863MLL/FLL/RLL
List of Tables
Table 1. FX Signal Threshold............................................................................................................................................... 17
Table 2. MDI/MDI-X Pin Definitions ..................................................................................................................................... 17
Table 3. Internal Function Block Status ................................................................................................................................ 22
Table 4. MII Signals ............................................................................................................................................................. 27
Table 5. RMII Clock Setting .................................................................................................................................................. 28
Table 6. RMII Signal Description.......................................................................................................................................... 29
Table 7. RMII Signal Connections........................................................................................................................................ 29
Table 8. MII Management Interface Frame Format ............................................................................................................. 30
Table 9. Serial Management Interface (SMI) Frame Format ............................................................................................... 31
Table 10. FID+DA Lookup in VLAN Mode ........................................................................................................................... 32
Table 11. FID+SA Lookup in VLAN Mode ........................................................................................................................... 32
Table 12. Spanning Tree States .......................................................................................................................................... 34
Table 13. SPI Connections .................................................................................................................................................. 39
Table 14. Data Rate Limit Table .......................................................................................................................................... 60
Table 16. Format of Static VLAN Table (16 Entries)............................................................................................................ 82
Table 17. Format of Dynamic MAC Address Table (1K Entries) ......................................................................................... 83
Table 18. Format of “Per Port” MIB Counters ...................................................................................................................... 84
Table 19. Port 1’s “Per Port” MIB Counters Indirect Memory Offsets.................................................................................. 85
Table 20. Format of “All Port Dropped Packet” MIB Counters............................................................................................. 85
Table 21. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets...................................................................... 86
Table 22. EEPROM Timing Parameters .............................................................................................................................. 89
Table 23. MAC Mode MII Timing Parameters...................................................................................................................... 90
Table 24. PHY Mode MII Timing Parameters ...................................................................................................................... 91
Table 25. RMII Timing Parameters ...................................................................................................................................... 92
Table 26. I2C Timing Parameters ........................................................................................................................................ 94
Table 27. SPI Input Timing Parameters............................................................................................................................... 95
Table 28. SPI Output Timing Parameters ............................................................................................................................ 96
Table 29. Auto-Negotiation Timing Parameters................................................................................................................... 97
Table 30. MDC/MDIO Timing Parameters ........................................................................................................................... 98
Table 32. Transformer Selection Criteria ........................................................................................................................... 101
Table 33. Qualified Single Port Magnetics......................................................................................................................... 101
Table 34. Typical Reference Crystal Characteristics ......................................................................................................... 101
August 2010
10
M9999-081810-1.2