KSZ8863FLLI Micrel Inc, KSZ8863FLLI Datasheet - Page 29

• Manufacturer Part Number: KSZ8863FLLI
• Description: IC ETHERNET SWITCH 3PORT 48-LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8863FLLI

• Controller Type: Ethernet Switch Controller
• Interface: MII
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3750

Micrel, Inc.
The RMII provided by the KSZ8863RLL is connected to the device’s third MAC. It complies with the RMII Specification.
The following table describes the signals used by the RMII bus. Refer to RMII Specification for full detail on the signal
description.
The KSZ8863RLL filters error frames, and thus does not implement the RX_ER output signal. To detect error frames from
RMII PHY devices, the SMTXER3 input signal of the KSZ8863RLL is connected to the RXER output signal of the RMII
PHY device.
Collision detection is implemented in accordance with the RMII Specification.
In RMII mode, tie MII signals, SMTXD3[3:2] and SMTXER3, to ground if they are not used.
The KSZ8863RLL RMII can interface with RMII PHY and RMII MAC devices. The latter allows two KSZ8863RLL devices
to be connected back-to-back. The following table shows the KSZ8863RLL RMII pin connections with an external RMII
PHY and an external RMII MAC, such as another KSZ8863RLL device.
August 2010
RMII
Signal Name
REF_CLK
CRS_DV
RXD1
RXD0
TX_EN
TXD1
TXD0
RX_ER
---
External
PHY Signals
REF_CLK
TX_EN
TXD1
TXD0
CRS_DV
RXD1
RXD0
RX_ER
KSZ8863RLL
PHY-MAC Connections
Direction
(with respect
to the PHY)
Input
Output
Output
Output
Input
Input
Input
Output
---
KSZ8863RLL
MAC Signals
REFCLKI_3
SMRXDV3
SMRXD31
SMRXD30
SMTXEN3
SMTXD31
SMTXD30
SMTXER3
Direction
(with respect
to the MAC)
Input or
Output
Input
Input
Input
Output
Output
Output
Input
(not required)
---
Table 7. RMII Signal Connections
Table 6. RMII Signal Description
Pin
Descriptions
Reference Clock
Carrier sense/
Receive data valid
Receive data bit 1
Receive data bit 0
Transmit enable
Transmit data bit 1
Transmit data bit 0
Receive error
RMII
Signal Description
Synchronous 50 MHz clock
reference for receive, transmit
and control interface
Carrier sense/
Receive data valid
Receive data bit 1
Receive data bit 0
Transmit enable
Transmit data bit 1
Transmit data bit 0
Receive error
---
29
KSZ8863RLL
MAC-MAC Connections
KSZ8863RLL
MAC Signals
REFCLKI_3
SMRXDV3
SMRXD31
SMRXD30
SMTXEN3
SMTXD31
SMTXD30
(not used)
KSZ8863RLL
RMII Signal (direction)
REFCLKI_3 (input)
SMRXDV3 (output)
SMRXD31 (output)
SMRXD30 (output)
SMTXEN3 (input)
SMTXD31 (input)
SMTXD30 (input)
(not used)
SMTXER3* (input)
* Connects to RX_ER
signal of RMII PHY device
External
MAC Signals
REF_CLK
CRS_DV
RXD1
RXD0
TX_EN
TXD1
TXD0
(not used)
KSZ8863MLL/FLL/RLL
M9999-081810-1.2