KSZ8863FLLI Micrel Inc, KSZ8863FLLI Datasheet - Page 55

• Manufacturer Part Number: KSZ8863FLLI
• Description: IC ETHERNET SWITCH 3PORT 48-LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8863FLLI

• Controller Type: Ethernet Switch Controller
• Interface: MII
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3750

Micrel, Inc.
Port Registers (Registers 16 – 95)
The following registers are used to enable features that are assigned on a per port basis. The register bit assignments are
the same for all ports, but the address for each port is different, as indicated.
Register 16 (0x10): Port 1 Control 0
Register 32 (0x20): Port 2 Control 0
Register 48 (0x30): Port 3 Control 0
September 2009
4-3
Bit
7
6
5
2
1
0
Broadcast
Storm
Protection
Enable
DiffServ
Priority
Classification
Enable
802.1p
Priority
Classification
Enable
Port-based
Priority
Classification
Tag Insertion
Tag
Removal
TXQ Split
Enable
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
= 1, enable broadcast storm protection for ingress packets on port
= 0, disable broadcast storm protection
= 1, enable DiffServ priority classification for ingress packets (IPv4) on
port
= 0, disable DiffServ function
= 1, enable 802.1p priority classification for ingress packets on port
= 0, disable 802.1p
= 00, ingress packets on port will be
classified as priority 0 queue if “Diffserv” or “802.1p” classification is not
enabled or fails to classify.
= 01, ingress packets on port will be
classified as priority 1 queue if “Diffserv” or “802.1p” classification is not
enabled or fails to classify.
= 10, ingress packets on port will be
classified as priority 2 queue if “Diffserv” or “802.1p” classification is not
enabled or fails to classify.
= 11, ingress packets on port will be
classified as priority 3 queue if “Diffserv” or “802.1p” classification is not
enabled or fails to classify.
Note: “DiffServ”, “802.1p” and port priority can be enabled at the same
time. The OR’ed result of 802.1p and DSCP overwrites the port priority.
= 1, when packets are output on the port, the switch will add 802.1p/q
tags to packets without 802.1p/q tags when received. The switch will not
add tags to packets already tagged. The tag inserted is the ingress
port’s “port VID”.
= 0, disable tag insertion
= 1, when packets are output on the port, the switch will remove
802.1p/q tags from packets with 802.1p/q tags when received. The
switch will not modify packets received without tags.
= 0, disable tag removal
= 1, split TXQ to 4 queue configuration. It cannot be enable at the same
time with split 2 queue at register 18, 34,50 bit 7.
= 0, no split, treated as 1 queue configuration
55
KSZ8863MLL/FLL/RLL
Default
00
0
0
0
0
0
0
M9999-091009-1.1