SC16C550BIA44 NXP Semiconductors, SC16C550BIA44 Datasheet - Page 46

• Manufacturer Part Number: SC16C550BIA44
• Description: UART, 16BYTE FIFO, 16C550, PLCC44
• Manufacturer: NXP Semiconductors

Specifications of SC16C550BIA44

• No. Of Channels: 1
• Data Rate: 3Mbps
• Supply Voltage Range: 2.25V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: PLCC
• No. Of Pins: 44
• Svhc: No SVHC (18-Jun-2010)
• Operating: RoHS Compliant
• Uart Features: Automatic Hardware Flow Control, Software Selectable Baud Rate Generator
• Rohs Compliant: Yes

NXP Semiconductors
15. Revision history
Table 31.
SC16C550B_5
Product data sheet
Document ID
SC16C550B_5
Modifications:
SC16C550B_4
SC16C550B_3
(9397 750 14986)
SC16C550B-02
(9397 750 14446)
SC16C550B-01
(9397 750 11967)
Revision history
Release date
20081001
20070316
20050620
20041214
20040326
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changed all occurrences of “V
Section 2
Table 2 “Pin
the CPU is not reading data. When active, DDIS can disable an external transceiver.” to “DDIS is
active (LOW) when the CPU is reading data. When inactive (HIGH), DDIS can disable an
external transceiver.”
Figure 6 “Autoflow control (auto-RTS and auto-CTS)
– changed “ACE1” to “UART 1”; changed “ACE2” to “UART 2”
– changed “RCVR” to “RX”
– changed “XMIT” to “TX”
Section 7 “Register
internal registers.” to “... for the twelve SC16C550B internal registers.”
Table 9 “SC16C550B internal
Table 19 “Modem Control Register bits
– description of MCR[3] re-written (removed reference to INT enable)
– description of MCR[4]: changed “TX” to “TX” and changed “RX” to “RX”
Table 24 “Limiting
– symbol V
Table 25 “Static
Table 26 “Dynamic
updated soldering information
“Features”: added new 7
description”: Description for signal DDIS changed from “DDIS is active (LOW) when
n
split to show 2 separate conditions: “at D7 to D0 pins” and “at input only pins”
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data
Product data
characteristics”: deleted (old) Table note [2] and its reference at R
values”:
characteristics”: added
descriptions”, first paragraph: changed from “... for the fifteen SC16C550B
Rev. 05 — 1 October 2008
registers”: changed MCR bit 3 from “OUT2, INT enable” to “OUT2”
CC
” to “V
th
bullet (and footnote)
DD
description”:
”
Table note [4]
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
Change notice
-
-
-
-
example”:
and its reference at t
Supersedes
SC16C550B_4
SC16C550B_3
SC16C550B-02
SC16C550B-01
-
SC16C550B
© NXP B.V. 2008. All rights reserved.
RESET
pu(int)
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