SC16C750BIB64 NXP Semiconductors, SC16C750BIB64 Datasheet - Page 20

• Manufacturer Part Number: SC16C750BIB64
• Description: UART, 64BYTE FIFO, 16C750, LQFP64
• Manufacturer: NXP Semiconductors

Specifications of SC16C750BIB64

• No. Of Channels: 1
• Data Rate: 3Mbps
• Supply Voltage Range: 2.25V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Svhc: No SVHC (18-Jun-2010)
• Operating: RoHS Compliant
• Uart Features: Automatic Hardware Flow Control, Software Selectable Baud Rate Generator
• Rohs Compliant: Yes

NXP Semiconductors
SC16C750B_5
Product data sheet
7.4 Interrupt Status Register (ISR)
The SC16C750B provides four levels of prioritized interrupts to minimize external software
interaction. The Interrupt Status Register (ISR) provides the user with four interrupt status
bits. Performing a read cycle on the ISR will provide the user with the highest pending
interrupt level to be serviced. No other interrupts are acknowledged until the pending
interrupt is serviced. Whenever the interrupt status register is read, the interrupt status is
cleared. However, it should be noted that only the current pending interrupt is cleared by
the read. A lower level interrupt may be seen after re-reading the interrupt status bits.
Table 12 “Interrupt source”
interrupt levels and the interrupt sources associated with each of these interrupt levels.
Table 12.
Table 13.
Priority
level
1
2
2
3
4
Bit
7:6
5
4
3:1
0
Interrupt source
Interrupt Status Register bits description
ISR[3]
0
0
1
0
0
Symbol
ISR[7:6]
ISR[5]
ISR[4]
ISR[3:1]
ISR[0]
ISR[2]
1
1
1
0
0
Rev. 05 — 17 October 2008
Description
FIFOs enabled. These bits are set to a logic 0 when the FIFO is not
being used. They are set to a logic 1 when the FIFOs are enabled.
64-byte FIFO enable.
not used
INT priority bit 2 to bit 0. These bits indicate the source for a pending
interrupt at interrupt priority levels 1, 2, and 3 (see
INT status.
logic 0 or cleared = default condition
logic 0 = 16-byte operation
logic 1 = 64-byte operation
logic 0 or cleared = default condition
logic 0 = an interrupt is pending and the ISR contents may be used
as a pointer to the appropriate interrupt service routine
logic 1 = no interrupt pending (normal default condition)
shows the data values (bit 0 to bit 4) for the four prioritized
ISR[1]
1
0
0
1
0
ISR[0]
0
0
0
0
0
5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs
Source of the interrupt
LSR (Receiver Line Status Register)
RXRDY (Received Data Ready)
RXRDY (Receive Data time-out)
TXRDY (Transmitter Holding Register Empty)
MSR (Modem Status Register)
SC16C750B
Table
© NXP B.V. 2008. All rights reserved.
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