SC16C750BIB64 NXP Semiconductors, SC16C750BIB64 Datasheet - Page 25

• Manufacturer Part Number: SC16C750BIB64
• Description: UART, 64BYTE FIFO, 16C750, LQFP64
• Manufacturer: NXP Semiconductors

Specifications of SC16C750BIB64

• No. Of Channels: 1
• Data Rate: 3Mbps
• Supply Voltage Range: 2.25V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Svhc: No SVHC (18-Jun-2010)
• Operating: RoHS Compliant
• Uart Features: Automatic Hardware Flow Control, Software Selectable Baud Rate Generator
• Rohs Compliant: Yes

NXP Semiconductors
SC16C750B_5
Product data sheet
7.8 Modem Status Register (MSR)
This register provides the current state of the control interface signals from the modem, or
other peripheral device to which the SC16C750B is connected. Four bits of this register
are used to indicate the changed information. These bits are set to a logic 1 whenever a
control input from the modem changes state. These bits are set to a logic 0 whenever the
CPU reads this register.
Table 21.
[1]
Bit
7
6
5
4
3
2
1
0
Whenever any MSR[0:3] is set to logic 1, a Modem Status Interrupt will be generated.
Symbol
MSR[7]
MSR[6]
MSR[5]
MSR[4]
MSR[3]
MSR[2]
MSR[1]
MSR[0]
Modem Status Register bits description
Description
Data Carrier Detect. DCD (active HIGH, logic 1). Normally this bit is the
complement of the DCD input. In the Loopback mode this bit is equivalent to
the OUT2 bit in the MCR register.
Ring Indicator. RI (active HIGH, logic 1). Normally this bit is the complement
of the RI input. In the Loopback mode this bit is equivalent to the OUT1 bit in
the MCR register.
Data Set Ready. DSR (active HIGH, logic 1). Normally this bit is the
complement of the DSR input. In Loopback mode this bit is equivalent to the
DTR bit in the MCR register.
Clear To Send. CTS. CTS functions as hardware flow control signal input if it
is enabled via MCR[5]. Flow control (when enabled) allows starting and
stopping the transmissions based on the external modem CTS signal. A
logic 1 at the CTS pin will stop SC16C750B transmissions as soon as current
character has finished transmission. Normally MSR[4] is the complement of
the CTS input. However, in the Loopback mode, this bit is equivalent to the
RTS bit in the MCR register.
DCD
RI
DSR
CTS
logic 0 = no DCD change (normal default condition)
logic 1 = the DCD input to the SC16C750B has changed state since the last
time it was read. A modem Status Interrupt will be generated.
logic 0 = no RI change (normal default condition)
logic 1 = the RI input to the SC16C750B has changed from a logic 0 to a
logic 1. A modem Status Interrupt will be generated.
logic 0 = no DSR change (normal default condition)
logic 1 = the DSR input to the SC16C750B has changed state since the last
time it was read. A modem Status Interrupt will be generated.
logic 0 = no CTS change (normal default condition)
logic 1 = the CTS input to the SC16C750B has changed state since the last
time it was read. A modem Status Interrupt will be generated.
Rev. 05 — 17 October 2008
[1]
[1]
[1]
[1]
5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs
SC16C750B
© NXP B.V. 2008. All rights reserved.
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