UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 201

• Manufacturer Part Number: UPD78F9222MC(T)-5A4-A
• Description: 8BIT MCU, 4K FLASH, 256B RAM, 78F9222
• Manufacturer: NEC

Specifications of UPD78F9222MC(T)-5A4-A

• Controller Family/series: UPD78
• No. Of I/o's: 17
• Ram Memory Size: 256Byte
• Cpu Speed: 10MHz
• No. Of Timers: 4
• No. Of: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

1. Stop bit length: 1
2. Stop bit length: 2
(c) Normal transmission
When bit 7 (POWER6) of asynchronous serial interface operation mode register 6 (ASIM6) is set to 1, and
then bit 6 (TXE6) of ASIM6 is set to 1 after one clock of the base clock (f
enable status is entered. Transmission operation can be started by writing transmit data to transmit buffer
register 6 (TXB6). The start bit, parity bit, and stop bit are automatically appended to the data.
When transmission is started, the data in TXB6 is transferred to transmit shift register 6 (TXS6). After that,
the data is sequentially output from TXS6 to the T
stop bits set by ASIM6 are appended and a transmission completion interrupt request (INTST6) is generated.
Transmission is stopped until the data to be transmitted next is written to TXB6.
Figure 11-15 shows the timing of the transmission completion interrupt request (INTST6). This interrupt
occurs as soon as the last stop bit has been output.
T
T
X
X
D6 (output)
D6 (output)
INTST6
INTST6
Figure 11-15. Normal Transmission Completion Interrupt Request Timing
Start
Start
CHAPTER 11 SERIAL INTERFACE UART6
D0
D0
User’s Manual U16898EJ5V0UD
D1
D1
D2
D2
X
D6 pin. When transmission is completed, the parity and
D6
D6
D7
D7
XCLK6
Parity
Parity
) has elapsed, transmission
Stop
Stop
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