UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 226

8BIT MCU, 4K FLASH, 256B RAM, 78F9222

UPD78F9222MC(T)-5A4-A

Manufacturer Part Number
UPD78F9222MC(T)-5A4-A
Description
8BIT MCU, 4K FLASH, 256B RAM, 78F9222
Manufacturer
NEC
Datasheet

Specifications of UPD78F9222MC(T)-5A4-A

Controller Family/series
UPD78
No. Of I/o's
17
Ram Memory Size
256Byte
Cpu Speed
10MHz
No. Of Timers
4
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal

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the interrupt is acknowledged after the instruction under execution is complete. Figure 12-8 shows an example of the
interrupt request acknowledgment timing for an 8-bit data transfer instruction MOV A, r. Since this instruction is
executed for 4 clocks, if an interrupt occurs for 3 clocks after the instruction fetch starts, the interrupt acknowledgment
processing is performed after the MOV A, r instruction is executed.
226
××IF:
××MK:
IE:
If an interrupt request flag (××IF) is set before an instruction clock n (n = 4 to 10) under execution becomes n − 1,
Interrupt
Clock
CPU
Interrupt request flag
Interrupt mask flag
Flag to control maskable interrupt request acknowledgment (1 = enable, 0 = disable)
Figure 12-8. Interrupt Request Acknowledgment Timing (Example of MOV A, r)
Figure 12-7. Interrupt Request Acknowledgment Processing Algorithm
No
MOV A, r
CHAPTER 12 INTERRUPT FUNCTIONS
Vectored interrupt
××MK = 0?
××IF = 1?
servicing
IE = 1?
Start
User’s Manual U16898EJ5V0UD
Yes (Interrupt request generated)
Yes
Yes
Saving PSW and PC, jump
No
No
to interrupt servicing
8 clocks
Interrupt request pending
Interrupt request pending
Interrupt servicing program

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