LH7A404N0F000B3 NXP Semiconductors, LH7A404N0F000B3 Datasheet - Page 4

• Manufacturer Part Number: LH7A404N0F000B3
• Description: MCU ARM9, LCD CTRL, SMD, LFBGA-324
• Manufacturer: NXP Semiconductors

Specifications of LH7A404N0F000B3

• Core Size: 32bit
• No. Of I/o's: 64
• Ram Memory Size: 80KB
• Cpu Speed: 200MHz
• Oscillator Type: External Only
• No. Of Timers: 3
• No. Of Pwm Channels: 4
• Digital Ic Case Style: LFBGA
• Supply Voltage Range: 3V
• Controller Family/series: LH7A
• Peripherals: ADC, DMA, RTC
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Program Memory Type: ROMLess
• Data Ram Size: 80 KB
• Interface Type: EBI , IrDA , JTAG , PS2 , SCI , UART , USB
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LFBGA
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LH7A404
4
LFBGA
W17
W16
W13
R16
U15
E15
F16
T15
Y17
V16
V13
Y18
Y19
T19
T20
T16
Y13
Y20
J16
M5
E6
R5
D2
E1
C1
C5
E4
F5
T6
F3
F4
L2
VSSC
VDDA
VSSA
VDDAD
VSSAD
nPOR
nURESET
WAKEUP
nPWRFL
nEXTPWR
nRESETOUT
XTALIN
XTALOUT
XTAL32IN
XTAL32OUT
PGMCLK
CLKEN
WIDTH0
WIDTH1
MEDCHG
INTBOOT
SIGNAL
Core Ground
Analog Power for PLL1 and PLL2
Analog Ground for PLL1 and PLL2
Analog Power for A/D, Touch Screen Controller
Analog Ground for A/D, Touch Screen Controller
Power on Reset
User Reset
Wake Up
Power Fail Signal
External Power
Reset Output to external devices. This pin carries the
same state as the internal SoC reset signal.
14.7456 MHz Crystal Oscillator pins. For an external
clock source, XTALIN can be used while XTALOUT is
left unconnected. XTALIN voltage is 1.8 V nominal.
32.768 kHz Real Time Clock, Crystal Oscillator pins.
To drive the device from an external clock source,
XTAL32IN can be used while XTAL32OUT is left
unconnected.
Programmable Clock (14.7456 MHz MAX.)
External Oscillator Enable Output
Boot Width Pins. Used with the MEDCHG and INT-
BOOT bits for internal Boot ROM. On power up, the
values on these pins are latched to determine the
width and type of Boot device. Boot width can be 8-,
16-, or 32-bit. The pins must be pulled HIGH with a 33
kΩ resistor.
Media Change bit; used at power on with INTBOOT
and WIDTHx pins to determine boot device.
When LOW, boot device is selected according to the
MEDCHG bit. When HIGH, the lower 64 kB address-
es are mapped to the internal Boot ROM.
Table 2. LH7A404 Functional Pin List (Cont’d)
DESCRIPTION
NXP Semiconductors
RESET
STATE
LOW
LOW
LOW
Input
Input
Input
Input
Input
Input
Input
Input
No Change
No Change
STANDBY
STATE
Input
Input
Input
Input
Input
LOW
LOW
Input
32-Bit System-on-Chip
Preliminary data sheet
OUTPUT
DRIVE
12 mA
8 mA
8 mA
I/O NOTES
I/O
O
O
I
I
I
I
I
I
I
I
3
3
3
3
3
3
3